AN10413
µC/OS-II Time Management in LPC2000
Rev. 01 — 15 December 2005 Application note
Document information
Info Content
Keywords µC/OS-II, MCU, ARM, LPC2000, Timer, IRQ, VIC
Abstract This application note demonstrates how to implement µC /OS-II time
management in LPC2000 microcontroller family from Philips
Semiconductors. In addition to perform time management of µC/OS-II, a
simple demo code is given. All together, the note offers users a quick
start in using µC/OS-II time management in LPC2000.
Philips Semiconductors
AN10413
µC/OS-II Time Management in LPC2000
Revision history
Rev Date Description
01 20051215 Initial version
Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, please send an email to: sales.addresses@www.semiconductors.philips.com
AN10413_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Application note Rev. 01 — 15 December 2005 2 of 16
Philips Semiconductors
AN10413
µC/OS-II Time Management in LPC2000
1. Introduction
µC/OS-II (Pronounced “Micro C O S 2”), which stands for Micro-Controller Operating
System Version 2, is a type of real-time operating system. Because of its real-time
kernel, ease to port, use and reliability, it is widely used in all kinds of applications such
as cameras, medical instruments, engine controls, ATM machines and many more.
µC/OS-II can run on most 8/16/32-bit microprocessors or microcontrollers.
Time management is one important part of µC/OS-II. It provides periodic interrupts to
keep track of time delay and timeouts. The periodic time is called Clock Tick. This
interrupt can be viewed as the system's heartbeat. Usually, a tick should occur between
10 and 100 times per second, or Hertz. The faster the tick rate, the higher the overhead
imposed on the system. The actual frequency of the clock tick depends on the desired
tick resolution of user application. Usually the tick source is obtained from a hardware
timer.
The LPC2000 family is based on the 16/32-bit ARM7TDMI-S
TM
microcontroller. All the
part numbers can support µC/OS-II. In LPC2000 family, two 32-bit timers/counters are
provided. Both can be used as the source of the tick. Here we use timer0 as an example
and timer0 will be configured to trigger an IRQ interrupt periodically. The code is
developed in ADS (ARM Development Suite) v1.2 and most written in ANSI C. The code
was tested on an evaluation board with LPC2129, which uses a 12 MHz crystal.
2. Initialization
2.1 Exception vector table
LPC2000 family is based on a 16/32-bit ARM7TDMI-S
TM
CPU. The ARM CPU contains an
exception vector table, which is used to support seven types of exception. When an
exception occurs, an execution is forced from a fixed memory address corresponding to
the type of exception. The exception vector table for the ARM is shown in Table 1:
Table 1: Exception vector table
Exception Mode Vector Address
Reset SVC 0x00000000
Undefined Instruction UND 0x00000004
Software Interrupt (SWI) SVC 0x00000008
Prefetch abort Abort 0x0000000C
Data abort Abort 0x00000010
- - 0x00000014
IRQ (Normal Interrupt) IRQ 0x00000018
FIQ (Fast Interrupt) FIQ 0x0000001C
When on reset, the CPU begins executing from the reset vector entry, then jumps to
initialization subroutine, starting system setting. The startup code is written in assembly
code as shown below:
AN10413_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Application note Rev. 01 — 15 December 2005 3 of 16
Philips Semiconductors
AN10413
µC/OS-II Time Management in LPC2000
Startup code
;Imported external symbols declaration
IMPORT Reset
IMPORT FIQHandler_C
; /*************************************
; Exception Vectors
; **************************************/
CODE32
AREA StartUp, CODE, READONLY
ENTRY
Vectors
LDR PC, ResetAddr
LDR PC, UndefinedAddr
LDR PC, SWI_Addr
LDR PC, PrefetchAddr
LDR PC, DataAbortAddr
DCD 0xb9205f80
LDR PC, [PC, #-0xff0] ;for vectored and non-vectored IRQ
LDR PC, FIQ_Addr
ResetAddr DCD Reset
UndefinedAddr DCD Undefined
SWI_Addr DCD Swi
PrefetchAddr DCD PrefetchAbort
DataAbortAddr DCD DataAbort
FIQ_Addr DCD FIQ_Handler
;/*****************************************
;Undefined instruction exception handler
;*****************************************/
Undefined
b Undefined
;/*****************************************
;Swi exception handler
;*****************************************/
Swi
b Swi
;/*****************************************
;Prefetch abort exception handler
;*****************************************/
PrefetchAbort
b PrefetchAbort
;/*****************************************
;Data abort exception handler
;*****************************************/
DataAbort
b DataAbort
;/****************************************
;FIQ exception handler
;****************************************/
AN10413_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Application note Rev. 01 — 15 December 2005 4 of 16
Philips Semiconductors
AN10413
µC/OS-II Time Management in LPC2000
FIQ_Handler
STMFD SP!, {R0-R3, LR}
BL FIQHandler_C ;call the FIQ ISR subroutine
LDMFD SP!, {R0-R3, LR}
SUBS PC, LR, #4
END
Actually, the given handlers in the startup code do not do anything useful. They are setup
here just for completeness. You can implement them according to your application.
2.2 System config
System config such as PLL, VPBDIV and MAM is performed in C code. The code is
tested on an evaluation board, which uses a 12 MHz crystal. To make CPU run at full
speed of 60 MHz, PLL is set to 5. And VPB is set to a quarter of CPU speed. Using
Memory Map Register, you can remap interrupt vectors to 0x0000 0000-0x000 0001c
(on-chip flash), 0x4000 0000-0x4000 001c (on-chip ram) or 0x8000 0000-0x8000 001c
(external memory, only for LPC22xx). The system initialization code is shown below:
#define PLL_PLLE 1 //PLL enable (1)or disable(0)
#define PLL_PLLC 1 //PLL connect(1) or disconnect(0)
#define PLL_M 5 //PLL Multiplier value
#define PLL_P 1 //PLL divider value: p
#define VPB_DIVIDER 0 //the divider of VPB
/* System Initialization */
void InitLPC2000(void) {
WDMOD=0; //disable WDT
VICIntEnClr=0xffffffff; //disable all interrupts
VICVectAddr=0;
VICIntSelect=0;
/* PLL configuration */
if(PLL_PLLE){
PLLCFG=(PLL_M- 1) | (PLL_P << 5);
PLLCON=PLL_PLLE;
PLLFEED = 0xAA;
PLLFEED = 0x55;
while((PLLSTAT & (1 << 10)) == 0); // Wait for PLL lock
PLLCON=PLL_PLLE|PLL_PLLC<<1; //connect PLL
PLLFEED = 0xaa;
PLLFEED = 0x55;
}
VPBDIV=VPB_DIVIDER; //peripheral clock config
/* MemRemap Config */
#ifdef __Ram_Mode
MEMMAP = 0x2; //remap to 0x40000000
#endif
AN10413_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Application note Rev. 01 — 15 December 2005 5 of 16
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