lis3de.zip_android_linux gsensor

/******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** * * File Name : lis3dh_acc.c * Authors : MSH - Motion Mems BU - Application Team * : Matteo Dameno (matteo.dameno@st.com) * : Carmine Iascone (carmine.iascone@st.com) * : Both authors are willing to be considered the contact * : and update points for the driver. * Version : V.1.0.12 * Date : 2012/Feb/29 * Description : LIS3DH accelerometer sensor API * ******************************************************************************* * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * THE PRESENT SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES * OR CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, FOR THE SOLE * PURPOSE TO SUPPORT YOUR APPLICATION DEVELOPMENT. * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * ****************************************************************************** Revision 1.0.6 15/11/2010 first revision supports sysfs; no more support for ioctl; Revision 1.0.7 26/11/2010 checks for availability of interrupts pins correction on FUZZ and FLAT values; Revision 1.0.8 2010/Apr/01 corrects a bug in interrupt pin management in 1.0.7 Revision 1.0.9: 2011/May/23 update_odr func correction; Revision 1.0.10: 2011/Aug/16 introduces default_platform_data, i2c_read and i2c_write function rewritten, manages smbus beside i2c Revision 1.0.11: 2012/Jan/09 moved under input/misc Revision 1.0.12: 2012/Feb/29 moved use_smbus inside status struct; modified:-update_fs_range;-set_range input format; allows gpio_intX to be passed as parameter at insmod time; ******************************************************************************/ #include <linux/err.h> #include <linux/errno.h> #include <linux/delay.h> #include <linux/fs.h> #include <linux/i2c.h> #include <linux/input.h> #include <linux/uaccess.h> #include <linux/workqueue.h> #include <linux/irq.h> #include <linux/gpio.h> #include <linux/interrupt.h> #include <linux/slab.h> #include <linux/kernel.h> #include <linux/device.h> #include <linux/module.h> #include <linux/moduleparam.h> #include "lis3dh.h" /* #define DEBUG 1 */ #define G_MAX 16000 #define SENSITIVITY_2G 1 /** mg/LSB */ #define SENSITIVITY_4G 2 /** mg/LSB */ #define SENSITIVITY_8G 4 /** mg/LSB */ #define SENSITIVITY_16G 12 /** mg/LSB */ /* Accelerometer Sensor Operating Mode */ #define LIS3DH_ACC_ENABLE (0x01) #define LIS3DH_ACC_DISABLE (0x00) #define HIGH_RESOLUTION (0x08) #define AXISDATA_REG (0x28) #define WHOAMI_LIS3DH_ACC (0x33) /* Expctd content for WAI */ /* CONTROL REGISTERS */ #define WHO_AM_I (0x0F) /* WhoAmI register */ #define TEMP_CFG_REG (0x1F) /* temper sens control reg */ /* ctrl 1: ODR3 ODR2 ODR ODR0 LPen Zenable Yenable Zenable */ #define CTRL_REG1 (0x20) /* control reg 1 */ #define CTRL_REG2 (0x21) /* control reg 2 */ #define CTRL_REG3 (0x22) /* control reg 3 */ #define CTRL_REG4 (0x23) /* control reg 4 */ #define CTRL_REG5 (0x24) /* control reg 5 */ #define CTRL_REG6 (0x25) /* control reg 6 */ #define FIFO_CTRL_REG (0x2E) /* FiFo control reg */ #define INT_CFG1 (0x30) /* interrupt 1 config */ #define INT_SRC1 (0x31) /* interrupt 1 source */ #define INT_THS1 (0x32) /* interrupt 1 threshold */ #define INT_DUR1 (0x33) /* interrupt 1 duration */ #define TT_CFG (0x38) /* tap config */ #define TT_SRC (0x39) /* tap source */ #define TT_THS (0x3A) /* tap threshold */ #define TT_LIM (0x3B) /* tap time limit */ #define TT_TLAT (0x3C) /* tap time latency */ #define TT_TW (0x3D) /* tap time window */ /* end CONTROL REGISTRES */ #define ENABLE_HIGH_RESOLUTION 1 #define ALL_ZEROES (0x00) #define LIS3DH_ACC_PM_OFF (0x00) #define LIS3DH_ACC_ENABLE_ALL_AXES (0x07) #define PMODE_MASK (0x08) #define ODR_MASK (0XF0) #define LIS3DH_ACC_ODR1 (0x10) /* 1Hz output data rate */ #define LIS3DH_ACC_ODR10 (0x20) /* 10Hz output data rate */ #define LIS3DH_ACC_ODR25 (0x30) /* 25Hz output data rate */ #define LIS3DH_ACC_ODR50 (0x40) /* 50Hz output data rate */ #define LIS3DH_ACC_ODR100 (0x50) /* 100Hz output data rate */ #define LIS3DH_ACC_ODR200 (0x60) /* 200Hz output data rate */ #define LIS3DH_ACC_ODR400 (0x70) /* 400Hz output data rate */ #define LIS3DH_ACC_ODR1250 (0x90) /* 1250Hz output data rate */ #define IA (0x40) #define ZH (0x20) #define ZL (0x10) #define YH (0x08) #define YL (0x04) #define XH (0x02) #define XL (0x01) /* */ /* CTRL REG BITS*/ #define CTRL_REG3_I1_AOI1 (0x40) #define CTRL_REG4_BDU_ENABLE (0x80) #define CTRL_REG4_BDU_MASK (0x80) #define CTRL_REG6_I2_TAPEN (0x80) #define CTRL_REG6_HLACTIVE (0x02) /* */ #define NO_MASK (0xFF) #define INT1_DURATION_MASK (0x7F) #define INT1_THRESHOLD_MASK (0x7F) #define TAP_CFG_MASK (0x3F) #define TAP_THS_MASK (0x7F) #define TAP_TLIM_MASK (0x7F) #define TAP_TLAT_MASK NO_MASK #define TAP_TW_MASK NO_MASK /* TAP_SOURCE_REG BIT */ #define DTAP (0x20) #define STAP (0x10) #define SIGNTAP (0x08) #define ZTAP (0x04) #define YTAP (0x02) #define XTAZ (0x01) #define FUZZ 0 #define FLAT 0 #define I2C_RETRY_DELAY 5 #define I2C_RETRIES 5 #define I2C_AUTO_INCREMENT (0x80) /* RESUME STATE INDICES */ #define RES_CTRL_REG1 0 #define RES_CTRL_REG2 1 #define RES_CTRL_REG3 2 #define RES_CTRL_REG4 3 #define RES_CTRL_REG5 4 #define RES_CTRL_REG6 5 #define RES_INT_CFG1 6 #define RES_INT_THS1 7 #define RES_INT_DUR1 8 #define RES_TT_CFG 9 #define RES_TT_THS 10 #define RES_TT_LIM 11 #define RES_TT_TLAT 12 #define RES_TT_TW 13 #define RES_TEMP_CFG_REG 14 #define RES_REFERENCE_REG 15 #define RES_FIFO_CTRL_REG 16 #define RESUME_ENTRIES 17 /* end RESUME STATE INDICES */ struct { unsigned int cutoff_ms; unsigned int mask; } lis3dh_acc_odr_table[] = { { 1, LIS3DH_ACC_ODR1250 }, { 3, LIS3DH_ACC_ODR400 }, { 5, LIS3DH_ACC_ODR200 }, { 10, LIS3DH_ACC_ODR100 }, { 20, LIS3DH_ACC_ODR50 }, { 40, LIS3DH_ACC_ODR25 }, { 100, LIS3DH_ACC_ODR10 }, { 1000, LIS3DH_ACC_ODR1 }, }; static int int1_gpio = LIS3DH_ACC_DEFAULT_INT1_GPIO; static int int2_gpio = LIS3DH_ACC_DEFAULT_INT2_GPIO; module_param(int1_gpio, int, S_IRUGO); module_param(int2_gpio, int, S_IRUGO); struct lis3dh_acc_status { struct i2c_client *client; struct lis3dh_acc_platform_data *pdata; struct mutex lock; struct delayed_work input_work; struct input_dev *input_dev; int hw_initialized; /* hw_working=-1 means not tested yet */ int hw_working; atomic_t enabled; int on_before_suspend; int use_smbus; u8 sensitivity; u8 resume_state[RESUME_ENTRIES]; int irq1; struct work_struct irq1_work; struct workqueue_struct *irq1_work_queue; int irq2; struct work_struct irq2_work; struct workqueue_struct *irq2_work_queue; int debug_flag; #ifdef DEBUG u8 reg_addr; #endif }; static struct lis3dh_acc_platform_data default_lis3dh_acc_pdata = { .fs_range = LIS3DH_ACC_G_2G, .axis_map_x = 0, .axis_map_y = 1, .axis_map_z = 2, .negate_x = 0, .negate_y = 0, .negate_z = 0, .poll_interval = 100, .min_interval = LIS3DH_ACC_MIN_POLL_PERIOD_MS, .gpio_int1 = LIS3DH_ACC_DEFAULT_INT1_GPIO, .gpio_int2 = LIS3DH_ACC_DEFAULT_INT2_GPIO, }; static int lis3dh_acc_i2c_read(struct lis3dh_acc_status *stat, u8 *buf,