INTERNATIONAL TELECOMMUNICATION UNION
ITU-T
G.726
TELECOMMUNICATION
STANDARDIZATION SECTOR
OF ITU
Appendix II
Test Vectors
(03/91)
SERIES G: TRANSMISSION SYSTEMS AND MEDIA,
DIGITAL SYSTEMS AND NETWORKS
Digital transmission systems – Terminal equipments –
Coding of analogue signals by methods other than PCM
Description of the digital test sequences
for the verification of the G.726
40, 32, 24 and 16 kbit/s ADPCM algorithm
Recommendation () i
FOREWORD
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The approval of Recommendations by the Members of the ITU-T is covered by the procedure laid down in
WTSC Resolution No. 1.
In some areas of information technology which fall within ITU-T’s purview, the necessary standards are
prepared on a collaborative basis with ISO and IEC.
INTELLECTUAL PROPERTY RIGHTS
The ITU draws attention to the possibility that the practice or implementation of this Recommendation may
involve the use of a claimed Intellectual Property Right. The ITU takes no position concerning the evidence,
validity or applicability of claimed Intellectual Property Rights, whether asserted by ITU members or others
outside of the Recommendation development process.
As of the date of approval of this Recommendation, the ITU had/had not received notice of intellectual
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ã ITU 1997
All rights reserved. No part of this publication may be reproduced or utilized in any form or by any means,
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0 R
DESCRIPTION OF THE DIGITAL TEST SEQUENCES FOR THE VERIFICATION
OF THE G.726 40, 32, 24 AND 16 KBIT/S ADPCM ALGORITHM
1 Introduction
This guide describes the test sequences (vectors) for the ADPCM algorithms of Recommendation
G.726 at the four fixed bit rates (16 kbit/s, 24 kbit/s, 32 kbit/s, 40 kbit/s) for both A-law and �-law. It
reproduces mainly the text of the CCITT collective letter No. 11/XV, dated 21/03/1991, the only
amendments corresponding to the grouping on two 3½" disks of the files which were previously on
four 5¼" disks.
The tests are arranged in two separate diskettes, one for the m-law and one for the A-law. For each
law, the diskette contains the reset test vectors and the homing test vectors. The diskettes are of the
3½ MS-DOS format
1
. Within each diskette, the files are distributed in subdirectories that correspond
to individual bit rates for the homing and reset case. A READ.ME file lists the contents of each
diskette.
2 General description
The verification testing procedure consists in applying an input sequence to an ADPCM
implementation and verifying that the output sequence is the same sequence in the output file for the
same test conditions (PCM coding law, type of input, initial state of the implementation).
There are three types of input sequences. The first type consists of various sinusoidal PCM inputs
that are representative of the signals expected in normal operation. These are called "normal inputs".
A second group of input sequences is the set of "overload inputs" that contain PCM signals of very
large amplitudes. The third group is the set of ADPCM sequences that can exercise the algorithm in
a manner that is not possible with any PCM input sequence. They test the arithmetic and algorithmic
performance of the ADPCM decoder by driving it to states that are unreachable by PCM signals
under normal conditions. For example, these states may result from errors on the transmission line.
These intermediate sequences will be denoted as "I-inputs".
The values (or samples) contained in a test file are given in ASCII hexadecimal representation with
two hexadecimal characters per 8-bit value. In files with 5-bit ADPCM values, the three most
significant bits are set to 0. Files containing 4-bit ADPCM values have the four most significant bits
or each value set to 0. Files that contain 3-bit ADPCM values have the five most significant bits of
each word set to 0. For files containing 2-bit ADPCM values, the six most significant bits are set
to 0. All PCM A-law inputs are in the format specified by Table 1a/G.711, i.e. the even bits are
inverted.
Each line in any file contains up to 32 values (or 64 characters) and ends with a line feed character.
Two more hexadecimal characters representing the result of a checksum computation over the entire
file are appended to each file. This checksum is the remainder of the division of 255 of the sum of all
sample values (two hexadecimal characters comprise a sample value) in the file.
3 Test configurations
Test sequences are derived for the two configurations shown in Figures 1 and 2, respectively. The
configuration of Figure 1 is the arrangement with the encoder transmitting to the decoder for error-
____________________
1
It has been noted that these diskettes do not always copy correctly using DISKCOPY due to the interaction
of DISKCOPY with certain character sequences found in the test sequences. Either files should be copied
individually using COPY, or XCOPY should be used instead of DISKCOPY.
Recommendation () 1
free operation. The configuration of Figure 2 allows for input ADPCM words that would not
normally emanate from an encoder and a PCM input word. The word formats of the various
sequences are detailed in Table 1.
Figure 1 – Encoder and decoder configuration
Figure 2 – Decoder only configuration
Table 1 – Word format of test sequences
Name
Description
Word format
S
PCM input word
Identical to that of SP described in the sub-block
COMPRESS of the synchronous coding adjuster
(4.2.8/G.726).
I
ADPCM word
As specified in the sub-block RECONST of the inverse
adaptive quantizer (4.2.3/G.726).
SD
PCM output word
Identical to that of SP described in the sub-block
COMPRESS (4.2.8/G.726).
4 Test combinations
The initial state of the implementation may be either the reset state of the algorithm defined in
Table 2 or a well-defined initial state that follows the application of an initialization (or homing)
sequence. Accordingly, there are two types of test sequences, reset sequences and homing sequences.
Table 2 – State values at reset
Variable
Value
A
1
, A
2
0
B
1
, ..., B
6
0
DQ
1
, ..., DQ
6
32
S SD
I
T1527700-97
PCM input sequence
Encoder
Decoder
PCM output sequence
ADPCM output
sequence
S SD
T1527710-97
ADPCM input sequence
PCM output sequence
Decoder
2 R
PK
1
, PK
2
0
SR
1
, SR
2
32
TD
0
YL
34 816
YU
544
The homing sequences are based on the initial states that follow the application of an initialization
(homing) sequence. These initialization sequences are described in further detail in 6.4.
For each initial state, both PCM laws (A-law and �-law) are considered. To allow for the
interoperation of both PCM laws, four possible input/output combinations must be considered as
shown in Table 3.
Table 3 – Input/output combinations
Input
Output
A-law
A-law
�-law
�-law
A-law
�-law
�-law
A-law
5 Test organization
Tables 4 to 7 contain the names of files containing various reset/homing sequences for the following
cases:
1) �-law;
2) A-law;
3) �
®
A; and
4) A
®
�.
Files whose names start with an "R" contain reset sequences while the names of files for the homing
sequences start with an "H". The suffix ".I" is reserved for the intermediate ADPCM encoder
response to a PCM input. Files with the suffix ".O" are the output PCM files.
Table 4 – Reset and homing sequences for µ-law
Normal
I-input
Overload
Algorithm
Input
(PCM)
Intermediate
(ADPCM)
Output
(PCM)
Input
(ADPCM)
Output
(PCM)
Input
(PCM)
Intermediate
(ADPCM)
Output
(PCM)
16F
NRM.M
RN16FM.I
HN16FM.I
RN16FM.O
HN16FM.O
I16
RI16FM.O
HI16FM.O
OVR.M
RV16FM.I
HV16FM.I
RV16FM.O
HV16FM.O
24F
NRM.M
RN24FM.I
HN24FM.I
RN24FM.O
HN24FM.O
I24
RI24FM.O
HI24FM.O
OVR.M
RV24FM.I
HV24FM.I
RV24FM.O
HV24FM.O
32F
NRM.M
RN32FM.I
HN32FM.I
RN32FM.O
HN32FM.O
I32
RI32FM.O
HI32FM.O
OVR.M
RV32FM.I
HV32FM.I
RV32FM.O
HV32FM.O
40F
NRM.M
RN40FM.I
HN40FM.I
RN40FM.O
HN40FM.O
I40
RI40FM.O
HI40FM.O
OVR.M
RV40FM.I
HV40FM.I
RV40FM.O
HV40FM.O