################################################################################
# Vivado (TM) v2019.1 (64-bit)
#
# README.txt: Please read the sections below to understand the steps required
# to simulate the design for a simulator, the directory structure
# and the generated exported files.
#
################################################################################
1. Simulate Design
To simulate design, cd to the simulator directory and execute the script.
For example:-
% cd questa
% ./top.sh
The export simulation flow requires the Xilinx pre-compiled simulation library
components for the target simulator. These components are referred using the
'-lib_map_path' switch. If this switch is specified, then the export simulation
will automatically set this library path in the generated script and update,
copy the simulator setup file(s) in the exported directory.
If '-lib_map_path' is not specified, then the pre-compiled simulation library
information will not be included in the exported scripts and that may cause
simulation errors when running this script. Alternatively, you can provide the
library information using this switch while executing the generated script.
For example:-
% ./top.sh -lib_map_path /design/questa/clibs
Please refer to the generated script header 'Prerequisite' section for more details.
2. Directory Structure
By default, if the -directory switch is not specified, export_simulation will
create the following directory structure:-
<current_working_directory>/export_sim/<simulator>
For example, if the current working directory is /tmp/test, export_simulation
will create the following directory path:-
/tmp/test/export_sim/questa
If -directory switch is specified, export_simulation will create a simulator
sub-directory under the specified directory path.
For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim'
command will create the following directory:-
/tmp/test/my_test_area/func_sim/questa
By default, if -simulator is not specified, export_simulation will create a
simulator sub-directory for each simulator and export the files for each simulator
in this sub-directory respectively.
IMPORTANT: Please note that the simulation library path must be specified manually
in the generated script for the respective simulator. Please refer to the generated
script header 'Prerequisite' section for more details.
3. Exported script and files
Export simulation will create the driver shell script, setup files and copy the
design sources in the output directory path.
By default, when the -script_name switch is not specified, export_simulation will
create the following script name:-
<simulation_top>.sh (Unix)
When exporting the files for an IP using the -of_objects switch, export_simulation
will create the following script name:-
<ip-name>.sh (Unix)
Export simulation will create the setup files for the target simulator specified
with the -simulator switch.
For example, if the target simulator is "ies", export_simulation will create the
'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib'
file.
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ZedBoard-Linux-pl-ps单个dma回环测试成功.rar (821个子文件)
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
__synthesis_is_complete__ 0B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
bd_afc3.bd 101KB
bd_afc3.bd 101KB
design_1.bd 36KB
design_1_wrapper.bit 3.86MB
design_1_wrapper.bit 3.86MB
bd_afc3.bxml 13KB
design_1.bxml 6KB
ps7_init.c 519KB
ps7_init.c 519KB
ps7_init_gpl.c 518KB
ps7_init_gpl.c 518KB
dma-proxy.c 15KB
dma-proxy-test.c 5KB
dma-proxy-test.c 5KB
specs.c 1B
specs.cpp 1B
.cproject 13KB
dma-proxy-test.d 114B
design_1_wrapper_routed.dcp 5.85MB
design_1_wrapper_placed.dcp 5.18MB
design_1_wrapper_opt.dcp 3.76MB
design_1_axi_smc_0.dcp 2.11MB
design_1_axi_smc_0.dcp 2.11MB
design_1_smartconnect_0_0.dcp 2.1MB
design_1_axi_smc_0.dcp 2.1MB
design_1_axi_dma_0_0.dcp 873KB
design_1_axi_dma_0_1.dcp 873KB
design_1_auto_pc_0.dcp 264KB
design_1_auto_pc_0.dcp 264KB
design_1_auto_pc_0.dcp 263KB
design_1_processing_system7_0_0.dcp 227KB
design_1_processing_system7_0_0.dcp 227KB
design_1_processing_system7_0_0.dcp 227KB
design_1_processing_system7_0_0.dcp 215KB
design_1_processing_system7_0_0.dcp 200KB
design_1_wrapper.dcp 132KB
design_1_axis_data_fifo_0_0.dcp 94KB
design_1_axis_data_fifo_0_1.dcp 86KB
design_1_axis_data_fifo_0_1.dcp 86KB
design_1_axis_data_fifo_0_1.dcp 86KB
design_1_proc_sys_reset_0_0.dcp 21KB
design_1_rst_ps7_0_100M_0.dcp 21KB
libps7.dll 460KB
libps7.dll 460KB
libps7.dll 460KB
libps7.dll 460KB
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libps7.dll 460KB
libps7.dll 460KB
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libps7.dll 460KB
libremoteport.dll 361KB
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libremoteport.dll 361KB
compile.do 33KB
compile.do 32KB
compile.do 30KB
compile.do 30KB
simulate.do 844B
simulate.do 838B
simulate.do 838B
elaborate.do 788B
simulate.do 193B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
simulate.do 11B
笔记.doc 937KB
linux-dma.elf 77KB
run.f 10KB
run.f 9KB
ps7_init.h 5KB
ps7_init.h 5KB
ps7_init_gpl.h 4KB
ps7_init_gpl.h 4KB
bd_afc3_one_0.h 3KB
bd_afc3_one_0.h 3KB
bd_afc3_one_0.h 3KB
bd_48ac_one_0.h 3KB
bd_afc3_one_0.h 3KB
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