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根据提供的文件信息，我们可以得出以下详细的IT知识点： ### 西门子IP242模块概述 **西门子IP242模块**是一款专为工业自动化应用设计的计数器模块，它集成了多种功能，如计数、中断管理等，并能够通过不同的配置满足特定的应用需求。 ### 模块特点 #### 1.1 一般描述 - **门控（Gate Control）**: IP242模块支持门控功能，即通过外部信号控制计数过程。 - **输入**: 模块提供多路输入接口，用于接收外部计数信号或其他触发信号。 - **输出**: 提供输出接口，用于发送计数结果或状态信息。 - **中断**: 支持中断机制，允许在特定事件发生时向主控制器发送中断请求。 - **Scalers**: 包含两个Scaler（标度器），Scaler1和Scaler2，用于扩展计数范围或实现复杂计数逻辑。 #### 1.2 块图 - 描述了模块内部的主要组件及其相互连接关系，有助于理解模块的工作原理。 #### 1.3 AM9513计数芯片 - **Master Mode Register**: 控制计数器的基本操作模式。 - **Counter Mode Register**: 配置计数模式，如递增、递减等。 - **Load Register**: 设置计数器的初始值或加载特定值。 - **Hold Register**: 保存当前计数值，在需要时读取。 - **Alarm Register**: 当计数器达到预设阈值时触发报警。 ### 模块寄存器 #### 1.4.1 控制寄存器 - 用于设置模块的基本工作模式和配置选项。 #### 1.4.2 功能编号寄存器 - 指定执行的具体功能或命令。 #### 1.4.3 中断屏蔽寄存器 - 控制哪些中断源可以触发中断。 #### 1.4.4 中断信息寄存器 - 存储当前未处理的中断请求信息。 #### 1.4.5 错误信号寄存器 - 记录模块运行过程中发生的错误状态。 #### 1.4.6 计数器结果寄存器 - 存储当前计数值。 ### 模块设置程序 #### 2.1 开关S1 - 地址设置 - 用于设定模块在网络中的唯一地址。 #### 2.2 开关S2 - 组中断 - 配置模块是否参与组中断。 #### 2.3 开关S3 - 系统中断 - 控制是否响应系统级中断。 #### 2.4 开关S4 - 门信号调节 - 调整门控信号的条件。 #### 2.5 开关S5 - 计数输入路由 - 决定哪个输入端口用于接收计数信号。 #### 2.6 开关S6 - 门输入路由 - 设定门控信号的来源。 #### 2.7 跳线分配 - 通过跳线来实现更复杂的配置。 #### 2.8 输入和输出 - 描述了各种输入和输出插头的功能及用途。 - 计数和门控输入的特性。 - 计数输出的特点。 - 信号调节的方式。 #### 2.9 模块引脚定义 - 列出了模块所有引脚的功能。 #### 2.10 模块内存映射 - 显示了各寄存器在模块内存中的位置。 ### 寄存器详细信息和使用方法 #### 3.1 INTM - 中断屏蔽寄存器 (AM9519) - 控制哪些中断被屏蔽，从而避免不必要的中断处理。 #### 3.2 INT1 - 中断信息寄存器 - 记录当前活跃的中断请求。 #### 3.3 MM - Master Mode Register (AM9513) - 定义计数器的操作模式，如自由运行、单次计数等。通过上述详细介绍，我们可以看出西门子IP242模块具有丰富的功能和灵活的配置选项，适用于多种工业自动化应用场景。用户可以根据具体需求进行细致的配置，以确保模块的最佳性能和可靠性。此外，深入理解这些配置选项对于充分利用模块的功能至关重要。

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SIEMENS

Counter

Module

Technical Reference Manual

Version

18:

10.

1986

Preface

This document provides detailed hardware and software information on

configurations for the five front connectors, are also included. The final

the

6ES5-242 Counter Module. The types of information and their

portion in this chapter contains the module's memory map.

locations within this manual are listed below.

Chapter

Description

and Use

Chapter

Hardware

Desgiption

Coverage examines manipulation of the module's internal registers.

This chapter presents a general description of the module and the two A description of each of the available counting modes is also

LSI chips that perform all counting and interrupt functions. Also, a

presented.

general description of each of the registers contained in the counterchip,

the interrupt chip and the remaining registers of the module is given.

Chapter

Module

Setup

lnformation concering initial setup, switch setting and jumper configu-

rations is provided. Specifications on the module's

110,

as well as pin

Contents

Chapter

Hardware

Description

General Description

.l .l

Gate Control

1.1.2 Inputs

1.1.3 Outputs

1.1.4 lnterrupt

1.1.5 Scaler

.6 Scaler 2

1.2

6ES5

242

Block Diagram

1.3

The AM

9513

Counter Chip

1.3.1 Master Mode Register (AM 951 3)

1.3.2 Counter Mode Register (AM 951 3)

1.3.3 Load Register (AM 951 3)

1.3.4 Hold Register (AM 951 3)

1.3.5 Alarm Register (AM 951 3)

1.4 6ES5

242

Module Registers

1.4.1 Control Register

1.4.2 Function Number Register

1.4.3 lnterrupt Mask Register

1.4.4 lnterrupt lnformation Register

1.4.5 Error Signal Register

1.4.6 Result of Counter Register

Chapter

Module

Setup

Procedures

2.1

Switch

Addressing

2.2

Switch

Group Interrupts

2.3

Switch

System Interrupts

2.4

Switch

Gate Signal Conditioning

2.5

Switch

Counter lnput Routing

2.6

Switch

Gate lnput Routing

2.7

Jumper Assignmets

2.8

lnputs and outputs

2.8.1 Plug Connectors

2.8.2 Counter and Gate Inputs

2.8.3 Counter Outputs

2.8.4 Signal Conditioning

2.9

Module Pin Out

2.10 6ES5

242

Module Memory Map

Chapter

Details

and

Use

3.1

INTM

lnterrupt Mask Register (AM

9519)

3.2

INTl -Interrupt lnformation Register

3.3

Master Mode Register (AM

9513)

3.3.1 Real

Time Clock: MM1

MM0

3.3.2 Comparators 1 and 2: MM3

MM2

3.3.3 Scaler

(FOUT) Pulse Source: MM7

MM4

3.3.4 Scaler 2 (FOUT) Scaling Factor: MM1 1

MM8

3.3.5 Scaler 2 (FOUT) Enable: MM1 2

3.3.6 Scaler 1 Counting Mode: MM1 5

3.3.7 Bits MM1 4 and MM1 3

3.4

CM-Counter Mode Register

(AM

9513)

3.4.1 Output Selection: CM2

CM0

3.4.2 Counting Direction: CM3

3.4.3 Counting Mode: CM4

3.4.4 Counting Type: CM5

3.4.5 Reloading Selection: CM6

3.4.6 Special Function Enable: CM7

3.4.7 Pulse Source Selection:

CM1

CM8

3.4.8 Cascading Counters

3.4.9 Pulse Edge Selection: CM1 2

3.4.10 Gate Control Selecion: CM15

CM13

3.5

Counter Modes

3.5.1 Mode A

3.5.2 Mode B

3.5.3 Mode C

3.5.4 Mode D

3.5.5 Mode E

Page

Chapter

Standard

Software

Function

Blocks

The two standard function blocks available for the 6ES5 242 module,

FBI58 and FB159, are examined. Function block parametersare listed and

explained in detail. The chapter closes with a few helpful programming

hints so you can manipulate the module's firmware.

Page

3.5.6 Mode

3.5.7 Mode G 56

3.5.8 Mode H 56

3.5.9 Mode

3.5.10 Mode

3.5.11 Mode

3.5.12 Mode

3.5.13 Mode N 57

3.5.14 Mode

3.5.15 Mode Q 57

3.5.16 Mode

3.5.17 Mode S 57

3.5.18 Mode

3.5.19 Mode

3.6

CTRL

Control Register

3.6.1 Control Words: CTRL7

CTRL5 58

3.6.2 Additional Functions 59

3.6.3 Counter Selection:

CTRL4

CTRLO 59

3.7

FNR

Function Number Register

3.8

FEM

Error Signal Register

3.8.1 Error Descriptions 60

3.9 Ex

Results of Counter Registers

Chapter

Standard Software

45 4.1

Function Block

158

4.1.1 Organization Blocks for 158

4.1.2 Explanation of

158

4.1.3 Parameter BGDB

4.1.4 Parameter.P/Q

4.1.5 Parameter PAFE

4.1.6 Parameter BFEH

4.1.7 Parameter SFEH

4.2

Function Block

159

48 4.2.1 Explanation of FB 159

49 4.2.2 Parameter BG

49 4.2.3 Parameter PQ

4.2.4 Parameters 24-1 and Z--5

4.2.5 Parameter BEF

4.2.6 Parameter DBDW

4.2.7 Parameter

INTL

4.2.8 Parameter FEML

4.2.9 Parameter PAFE

4.3

Standard Software Data Blocks

4.4

159

Usage

4.4.1 Access Time

4.4.2 MM and

INTM Registers

4.4.3 Alarms Registers

Appendix A

Appendix B

Figures

1-1 6ES5-242 Counter Module Block Diagram

2-1

242 Module Plug Connector Block Diagram

2-2 242 Module Plug Connector

Pinout

2-3 Counter

Gate lnput Circuitry

2-4 Counter

Gate lnput TTL Level Circuitry

2-5 Counter

Gate lnput 24

Level Circuitry

2-6 Counter Output Circuitry

4-1 Function Block 158

4-2 Function Block 159

Tables

4-1 Organization Block Calls

4-2 Data Block Assignments

Chapter

Hardware Description

General Description

The 6ES5-242 module consists of five high speed counters

which can be independent of each other, or cascaded. The

following is a general discussion of capabilities available with

the

6ES5-242 Counter Module. Details of these capabilities

and how to configure the module is presented in Chapter 2

of this manual.

Gate Control

Each counter can be enabled with either an external field

signal or an internailly generated signal. A variety of signal

configurations is available for the gate inputs.

1.1.2

Inputs

Internally generated signals from the output of one of the other

counters, or output from one of the two internal scalers are

provided. External inputs are provided from each of the

counters, which can be connected to a user application.

Outputs

The outputs may be used internally to feed another counter

or to trigger an interrupt; or externally connected to a user

function.

Interrupts

Counters 1

allow you to program the counter to generate

an interrupt when a specific count is reached. All of the

counters can generate an interrupt (if enabled) when the

counter's output becomes active. The counter's active state

can be defined by the user.

Gate inputs 1, 2,

3 are connected directly to the interrupt

controller, and can be enabled to generate an interrupt when

they are active. The gate inputs signals can be selected for

active high or active low states. These three interrupts operate

separately and are not influenced by counters 1, 2, or 3.

-5

Scaler

An internal scaler is available whose five fixed frequency

outputs can be routed to the input of any of the counters or

the input of Scaler 2. The 2

MHz system clock is used as the

input frequency to the scaler. The outputs are scaled in factors

of 10 or 16 from the input frequency.

Scaler

Scaler 2 is used to scale its input by a selectable factor between

1 and 16. The input can be selected from any of the counter

inputs, gate inputs, or Scaler 1 outputs. The output of Scaler 2

can be connected by a jumper, selectable on switches S5

or S6 to the counter inputs, or gate inputs of any of the five

counters.

1.2

6ES5-242

Block Diagram

The 6ES5-242 counter module is an intelligent peripheral

controlled by a 8085 microprocessor system. The module

uses the AM 9513 Counter Chip, which contains five

independent, high-speed 16-bit counters to perform the

counting operations. The AM 9519, an interrupt controller, is

used to control the user-programmable interrupt structure.

The

firmware for the module is stored on a 4K byte EPROM.

1K byte CMOS RAM chip is used for data storage.

The counter and gate inputs and the counter outputs are

optically to the front connectors of the module. Figure 1-1 is

a block diagram of the logic on the

6ES5-242 counter module.

The control logic handles the interface between the

6ES5-242

and the PC.

Counter Module

Block Diagram

8085

8KEpm

Microprocessor

firrnware)

user)

(temp storage)

Interrupt

Controller

Figure

1-1

6ES5-242

Counter Module Block Diagram

Chapter

Hardware Description

1.3

The

9513

Counter Chip

The AM 9513 counter chip contains five high-speed counters

which can be programmed to perform various counting and

scaling functions. A general description for each of the 16-bit

registers that control these counters is given below.

1.3.1 Master Mode Register (AM 951 3)

The Master Mode register (MM) is used to enable and perform

special functions which are common to each individual

counter. There is one master mode register for all five counters.

These functions include:

Defining and enabling the inputs, outputs, and scaling factor

for Scaler

This is the main function of the MM register

Providing an enable bit for the output of Scaler 2. The

output of Scaler 2 will be referred to as FOUT

Providing enable bits for the two comparators that are

available for Counters 1 and

Providing a bit to select the operating mode of Scaler

Either binary scaling or BCD scaling is allowed

Providing two bits which are used to control and enable

the real-time clock function

1.3.4 Hold Register (AM 9513)

There is one Hold register (H) for each of the five counters.

The Hold register is used as a storage buffer for the counter

value. The contents of the counter will be transferred to the

Hold register via a software command. This feature allows the

user to check the current value of the counter without

interrupting the counting operation.,

The Hold register cannot be read directly; its data is first

transferred to the result of counter register. You must then

read the result of counter register to retrieve the value stored

in the Hold register. The result of Counter register is described

in Section

1.5.1.

1.3.5 Alarm Register (AM 951 3)

There are two Alarm registers (A); one for Counter

and one

for Counter 2. The Alarm register is used in conjunction with

the comparators available to Counters 1 and 2. The Alarm

with the counter value. If the comparator is enabled in the

Master Mode register, the output of the counter will become

active only when the Alarm -register value equals the counter

value. The Alarm register may also be referred to as the

Interrupt register.

1.3.2 Counter Mode Register (AM 9513)

There is one Counter Mode register (CM) for each of the five

1-4

6ES5-242

Module Registers

counters. The counter mode registers are used to provide

The 6~~5-242 module has several registers which are not

control, setup, and operation of each individual counter.

found in the AM 9513 or the AM 9519 chips. These registers

These functions include:

are used for various functions which are not available on the

Providing four bits to select one of 16 available pulse

AM 9513 or the AM 9519, but are necessary for the operation

sources to the counter

of the AM 9519, but are necessary for the operation of the

Providing a bit to enable or disable the gate control functions

module. A brief description of these registers is presented.

Providing three bits to select the operating mode of the

1-4.1 mntrOl ~~~i~t~~

aate control function

The Control register (CTRL) is used to control various functions

Providing a bit to select the counting pulse edge, either

and

counter

selections

the

9513. This

not

rising or falling edge

normally addressed directly by the user; the function blocks

Providing a bit to select one of two registers from which

used to communicate with the

6ES5-242 module will handle

the counter value can be loaded

any data transfers to this register. These functions include:

Providing a bit to select one of two counting modes, either

Providing three bits to select from one of eight possible

continuous or

onecycle mode chip operations which include: parameter assignment,

Providing a bit to select the counter's operating mode, either

counter manipulation, and selection of additional functions.

binary or BCD counting

Providing five bits, one for each counter, which are used

Providing a bit to select the counting direction, either up

counting or down counting.

to specify which counter or counters are to be involved in

the operation selected by the other three bits of the register.

Providing three bits to select the output configuration of

the counter

1.4.2 Function Number Register

The Function Number Register (FNR) is used to identify the

1.3.3 Load Register (AM 9513)

user-stored functions. These functions can be stored on a

byte EPROM.

There is one Load register (L) for each of the five counters.

The Load register is used to provide the counter with a preset

count value which is set by the user.

Chapter

Module Setup Procedures

This section will describe in detail the setup of the six switches SWITCH S1 Jumper Assignments

located on the

6ES5-242 module.

Jumper Address

2.1

Switch

Addressing

The S1 switch is used to select the module's address within

6-1 1

a PC. It is connected to the address lines A4

The

5-1 2

addressing range is selected from 128 to 240 decimal. The

4-13

following figures show the details of the S5-150, S5-135U,

3-14

and S5-115U.

2-1 5

1-16

All A10 A9 A8 A7 A6 A5 A4 A3 A2

A1 A0

xxxx1sssoooo

module address sub address

irrelevant if jumper E-F is

removed.

If jumper E-F is

installed, All

A8 should be open. Note that jumper

E-F should only be installed for the S5-210 system.

selected or jumper closed. A7 must be closed to have

an address of at least 128.

selectable jumpers. With jumpers A6

A4 there are eight

different addresses

selectable for the module.

represents the sub 'address, A3

AO. Each module has

16 internal addresses which are relative to the

madule's

address.

All A10 A9 A8 A7 A6 A5 A4 A3 A2

A1 A0 Decimal Hex

1 0

0 0 0

0 128-143~~80-~~8F

X X

1 0

0 1 0

0 0

144-159~~90-~~9F

1 0

0 0 0 0

160-175xxAO-xxAF

1 0

1 1 0

0 0 0 176-19lxxBO-XXBF

X X

1 1

0 0

192-207xxCO-XXCF

X X X

1 1

0 1 0

0 0 208-223xxDO-XXDF

1 1

0 0 0 0

224-239xxEO-XXEF

X X

1 1

0 0 0 0

240-255xxFO-XXFF

irrelevant it jumper E-F is open. If jumper E-F is closed,

jumpers must be open.

jumper closed.

0 =jumper open.

For the S5-210 system bus the addressing range is between

FOlxH and FFFxH. A maximum of 255 modules may be

addressed.

All A10 A9 A8 A7 A6 A5 A4 A3 A2

A1 A0

ss ssssss0000

module address sub address

Jumper E-F should be installed for the S5-210 system.

selectable jumpers. With jumpers All

A4 there are 255

different addresses selectable for the module.

represents the sub address, A3

AO. Each module has

16 internal addresses, which are relative to the module's

address.

2.2

Switch

Group Interrupts

NOTE:

your

is not the S5-150S,

all

jumpers on Switch S2

should be open and the setting of switch

is not necessary.

Switch S2 is used in conjunction with the 150s PC. The 150s

does not have a hardware interrupt line on the backplane of

the PC as do the

135U, 115U, and the 210 PCs. Instead the 150

uses IBO (input byte

0) to provide interrupt capabilities. To

allow the use of IBO the 242 module provides special circuitry

which allows it to simulate IBO.

The

150s system may contain up to eight 242 modules. If the

interrupt capabilities are to be used, each of the modules

used within the PC must be assigned a group interrupt code.

This is accomplished with switch S2.

The first module used within the PC must be assigned as the

Master module. If only one module is used, it must be assigned

as the Master. When an interrupt occurs it will appear on IBO,

bit

0 for the module that is coded as the Master.

The remaining modules used in the PC will be assigned a slave

number, slaves

7. These slave numbers correspond to the

remaining bits in IBO; i.e., slave 2 will be

180.2.

The 150s interrupt system has a priority organization, IBO.0

has the highest priority and IB0.7 has the lowest priority.

This in turn will be true for the 242 modules installed within

the PC. The Master will have interrupt priority over the slaves,

slave 1 will have priority over slave 2 and so on.

Also used in conjunction with switch S2 will be jumper G-H.

The jumper G-H is used to determine if the module is the

Master or a slave. The following table reflects the correct

settings for each of thr eight possible modules.

IB0.x S2 Jumper Description

OBX

'Jumper G-H

Master

Slave 1

Slave 2

Slave 3

Slave 4

Slave 5

Slave 6

Slave

open

closed

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