2
Scaling new cell processes, such as double
printing and selective emitter, will demand
major advances in the quality, accuracy and
precision of screen printing, and greater
levels of process control automation. Next
generation cell designs will utilize entirely
new process technologies, requiring cell
manufacturing platforms that are extendible
with reduced capital outlay. Applied Baccini
is enabling these new technologies with
integrated platform and process solutions that
deliver high yield and throughput in volume
manufacturing.
ADVANCING SCALE AND TECHNOLOGY
SIMULTANEOUSLY
ATTACkING COST pEr wATT
CrYSTALLINE SILICON CELL EVOLUTION
Bulk silicon represents 30% of the cost of a
solar cell
–
its most expensive component.
To minimize cost, the industry must reduce
wafer breakage, while moving to ever thinner
silicon wafers. Applied Baccini has a history of
innovation in soft wafer handling, which greatly
reduces wafer breakage at high manufacturing
throughputs. In addition, silver paste
consumption represents nearly 50% of cell
metallization cost. By enabling double printing
processes, Applied Baccini is helping to reduce
paste costs by up to 30%.
Increasing factory megawatt output has a
major impact on reducing cost per watt. This
requires processing cells at very high net
throughputs, without sacrificing yield.
Advances in hardware architecture and factory
automation will be needed to maximize
throughputs at high yield.
Applied Baccini is driving innovations in print
head design, platform architecture, wafer
handling and factory automation software in
order to increase net throughput that will enable
lowest overall cost for cell manufacturers.
MAP
™
Yield
Metrology
GEN 2GEN 1
CRYSTALLINE SILICON CELL EVOLUTION
Module Eciency (%)
2010 2011 2012 2013
Conventional
Cell
Selective Emitter (SE)
Shallow Emitter
2-Side
Passivation
Back
Contact
Double Print (DP)
GEN 1.5
Increasing cell eciency is the biggest lever for
reducing the cost of solar PV. Every percentage
point increase in cell eciency translates
directly into a 10 cent reduction in cost per
watt. The higher cell eciency also reduces
the panel area required to generate a given
solar output, lowering balance-of-system cost.
Increasing Cell Eciency Reducing Material Cost Scaling Throughput
To achieve these eciency advances, the
industry will undergo a series of major
technology transitions in cell design over
the next several years. Producing these
new cell technologies at high yield can only
be accomplished with a fundamental and
dramatic shift in manufacturing capabilities.
1% EffICIENCY = 10¢/wATT
