Abstract—In order to ensure high quality of service (QoS) for
Next Generation Network (NGN), we construct an innovative
Load-Balanced Multipath Self-routing Switching Structure
which consists of the same two multipath self-routing fabrics.
The result of simulation is inspiring for achieving 100%
throughput and no delay or jitter. For this reason, we start on
the implementation on an Altera StratixIV FPGA. And the
whole FPGA system is designed into two collaborative
components: the UDP system and the register system. With two
algorithms around input and output two stages, incoming traffic
is transformed into uniformity and then to their final
destinations. During the later period debugging, software
simulation platform and automated test platform are built,
which contribute to our work very much. At last, we carry out
several experiments to test and verify our system. The report of
the test result accords with what we expected.
Index Terms—Next Generation Network, Load-Balanced,
Self-routing, Switching Fabric, FPGA
I. INTRODUCTION
N recent years, with a rapid increase in the number of
Internet users, the network scale expands unceasingly. Rich
Internet applications, especially the popularity of online video
services [1], contribute to the network congestion that almost
everyone experienced. This phenomenon puts forward a huge
challenge to the vital component, the router. Actually, the
router has become a significant bottleneck in the development
of the network. On the other hand, on the basis of TCP/IP, the
network layer of Internet only provides the best effort delivery
rather than the commitment for quality of service (QoS) [2].
In order to improve the performance of routers and reduce
implementation costs, various kinds of solutions are proposed.
Manuscript received December 23, 2014; revised January 10, 2014. This
work was supported in part by the National Basic Research Program of
China (973 Program) under Grant 2012CB315904, the National Natural
Science Foundation of China under Grant 61179028, the Natural Science
Foundation of Guangdong Province under Grant 201101000923 and
2013020012822, the Basic Research of Shenzhen under Grant
201104210120A and 20130331144502026.
Qian Zhan is with the Peking University Shenzhen Graduate School,
Shenzhen, GuangDong 518055 P.R.China (e-mail: zhanqian0218@
gmail.com).
Hui Li is with the Peking University Shenzhen Graduate School,
Shenzhen, GuangDong 518055 P.R.China. He is the director of Shenzhen
Eng. Lab of Converged Networks Technology and the deputy director of
Shenzhen Key Lab of Cloud Computing Tech. & App. (phone:
0086-755-26035354; mobile phone: 0086-13602672514; e-mail:
huilihuge@163.com).
Fuxing Chen is with the Peking University Shenzhen Graduate School,
Shenzhen, GuangDong 518055 P.R.China (e-mail: chenfuxing@
pku.edu.cn).
Li Ma is with the Peking University Shenzhen Graduate School,
Shenzhen, GuangDong 518055 P.R.China (e-mail: mali5057@163 .com).
The Load-Balanced Birkhoff-von Neumann switch [3]
interests us for that it can achieve 100% throughput under
most network traffic by using a balancer to equalize input
flows. However, the structure does not maintain the order of
packets after switching and the average packet queuing delay
increases linearly with the number of ports. Obviously, it is
not suitable for large scale extension. On the contrary, another
structure we focus on, the Banyan-based Quasi-Circuit Switch
[4] has low component complexity O (Nlog
2
N, N is the
number of ports) and the ability of self-routing and distributed
processing. However, because of the blocking feature, QoS is
not ensured.
Based on the advantages and disadvantages of the above
two kinds of structures, we propose a Load-Balanced
Multipath Self-routing Switching Structure by connecting two
multipath self-routing fabrics in series. The first one acts as a
balancer and the other one severs as a router. Concentrators,
which are made up by basic sorting units, are sorted by the
arrangement rules of Multistage Interconnection Network to
construct the whole structure. Theoretical analysis and NS2
simulation indicate that our model can obtain 100%
throughput under normal circumstances and easy to be
expanded in size [5].
Further, we translate the theoretical model into a modular
FPGA system which consists of two main parts: the UDP
system and the register system. And then, the whole system
has been implemented on an Altera StratixIV FPGA. In the
testing phase, our system works steadily and efficiently and
meets the basic requirements for QoS applications.
The rest of the paper is organized as follows. Theoretical
basis and modeling are introduced in Section II. Section III
describes the system design and implementation based on
FPGA. Section IV presents system testing with real network
traffic, and then Section V summarizes the whole work.
II. THEORETICAL BASIS AND MODELING
A. 2
×
2 Basic Sorting Unit
The 2×2 basic sorting unit is a sequential logic circuit, with
two inputs and two outputs (respectively called 0/1 port).
According to the theory of algebraic distributive lattices [6],
we define the two inputs as Ω
0
and Ω
1
, each of which has three
kinds of data: the one going to output0, the one going to
output1 and the invalid data. As list in Table I, the sorting unit
has two essential states: Cross and Bar. That means the inputs
go to the different outputs: input0/input1 to output1/output0
and input0/input1 to output0/output1, corresponding to Cross
and Bar, respectively.
Design and Implementation of Load-Balanced
Multipath Self-routing Switching System
Qian Zhan, Hui Li
*
, Fuxing Chen, Li Ma
I
Proceedings of the International MultiConference of Engineers and Computer Scientists 2014 Vol II,
IMECS 2014, March 12 - 14, 2014, Hong Kong
ISBN: 978-988-19253-3-6
ISSN: 2078-0958 (Print); ISSN: 2078-0966 (Online)
IMECS 2014
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