第
30
卷第
3
期
2013
年
5
月
深圳大学学报理工版
JOURNAL
OF
SHENZHEN
UNIVERSITY
SCIENCE
AND
ENGINEERING
[电子与信息科学/
Electronics
and
Inf
ormation
Science]
Vo
l.
30 No.3
May
2013
具有
MUX
模式的新型
LUT
结构及其优化算法
郭旭峰
1
，
2
王作建
3
李明于芳
l
1
)中国科学院微电子研究所，北京
100029;
2)
中国科学院大学物理学院，北京
100049;
3)
飘石科技有限公司，北京
100029
摘
要:针对传统
4-LUT
实现多路选择器(
multiplexer
,
MUX)
时逻辑利用率低，延迟略大的不足，
提出具有
MUX
模式的新型查找表(l
ook-up
table
,
LUT)
结构
-M-LUT.
M-LUT
通过改进传统
4-LUT
结构，
使其在兼容传统
4-LUT
功能的基础上新增
MUX
模式，仅需画己直
l
个
MUX
模式的
M-LUT
即可实现
1
个
MUX4
功能，且延迟仅为一级
LUT
延迟.为
M-LUT
设计配套的优化算法，以提高
M-LUT
利用率.实验结
果显示，采用
M-LUT
加优化算法后，
LUT
资源占用平均减少
8.4%
，电路时钟频率平均提高
3.1%.
关键词:微电子学;多路选择器;查找表
MUX
优化算法;现场可编程门阵列;电子设计自动化
中图分类号
TN
47;
TP
319
文献标志码
A
doi:
10.
3724/SP.
J.
1249.2013.03248
A new LUT construct
with
岛
1UX
mode
and
the corresponding optimization algorithm
Guo Xufeng
1
,2
，明
Tang
Zuojian
3
, Li
Ming
1
,
and
Yu
Fang
lt
1)
Institute
of
Microelectronics
of
Chinese Academy
of
Sciences , Beijing 100029 ,
P.
R.
China
2)
School
of
Physics , University
of
Chinese Academy
of
Sciences , Beijing 100049 ,
P.
R.
China
3)
Uptops Design Technologies Inc , Beijing 100029 ,
P.
R.
China
Abstract:
A
novel
LUT
(look-up
table)
construction
method
with
MUX
mode
called
r
町
-LUT
is
proposed
to solve
the
inefficient
use
of
area
,
and
the
delay
problem
of
multiplexer
(MUX)
implementation
with
the
traditional
4-LUT.
M-LUT
is
derived
by
modifying
the
traditional
4-LUT.
This
M-LUT
not
only
retains
all
functions
of
the
4-LUT
but
also
develops
an
extra
MUX
mode.
Only
one
configuration
of
M-LUT
under
MUX
mode
was
needed
to
implement
a
MUX4
,
and
the
delay
was
reduced
to
LUT
level
one.
A
corresponding
optimization
algorithm
is
also
designed
for
M-LUT
to
reconstruct
MUX
tree
into
MUX4
cells.
Experimental
results
show
that
with
the
M-LUT
and
the
optimization
algorithm.
The
LUT
resource
utilization
is
reduced
by
8.4%
,
and
the
clock
frequency
is
increased
by
3.
1 %
on
average.
Key
words:
microelectronics;
multiplexer;
look-up
table;
MUX
optimization
algorithm;
field
programmable
gate
a
盯
ay;
electronic
design
automation
多路选择器(
multiplexer
,
MUX)
作为数字电
路系统中构建数据通路的常用组件，被广泛用于各
Received: 2012-12-18; Accepted: 2013-04-15
种现场可编程门阵列
(field
programmable
gate
缸'
ray
,
FPGA)
设计中，如处理器、各种总线结构、
Foundation:
National
Science
and
Technology
Major
Project
of
China
(Yl
GZ212002)
t Corresponding author:
Research
fellow
Yu
Fang.
E-mail:
归
fang@
red.semi.ac.cn
Citation:
Guo
Xufeng
,
Wang
Zuojian
,
Li
Ming
,
et
a
l.
A
new
LUT
construct
with
MUX
mode
and
the
corresponding
optimization
algorithm
[J
J.
Journal
of
Shenzhen
Univers
町
Science
and
Engineering
,
20
日，
30
(3)
:
248-253.
(in
Chir
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