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方屏0.96控制芯片SSD1317规格书1
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6.1.1 6.1.2 6.1.3 6.1.4 6.1.5
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SOLOMON SYSTECH
SEMICONDUCTOR TECHNICAL DATA
This document contains information on a new product. Specifications and information herein are subject to change
without notice.
http://www.solomon-systech.com
SSD1317
Rev 1.0 P 1/32
Dec 2015
Copyright
2015 Solomon Systech Limited
SSD1317
Advance Information
128 x 96 Dot Matrix
OLED/PLED Segment/Common Driver with Controller
Solomon Systech
Dec 2015
P 2/32
Rev 1.0
SSD1317
Appendix: IC Revision history of SSD1317 Specification
Version
Change Items Effective Date
1.0 1
st
Release 21-Dec-15
SSD1317
Rev 1.0
P 3/32
Dec 2015
Solomon Systech
CONTENTS
1
GENERAL DESCRIPTION ....................................................................................................... 6
2
FEATURES................................................................................................................................... 6
3
ORDERING INFORMATION ................................................................................................... 6
4
BLOCK DIAGRAM .................................................................................................................... 7
5
PIN DESCRIPTION .................................................................................................................... 8
6
FUNCTIONAL BLOCK DESCRIPTIONS ............................................................................ 11
6.1
MCU
I
NTERFACE SELECTION
............................................................................................................................... 11
6.1.1
MCU Parallel 6800-series Interface ........................................................................................................... 11
6.1.2
MCU Parallel 8080-series Interface ........................................................................................................... 12
6.1.3
MCU Serial Interface (4-wire SPI) ............................................................................................................. 13
6.1.4
MCU Serial Interface (3-wire SPI) ............................................................................................................. 14
6.1.5
MCU I
2
C Interface ...................................................................................................................................... 15
6.2
C
OMMAND
D
ECODER
.......................................................................................................................................... 18
6.3
O
SCILLATOR
C
IRCUIT AND
D
ISPLAY
T
IME
G
ENERATOR
...................................................................................... 18
6.4
R
ESET
C
IRCUIT
.................................................................................................................................................... 19
6.5
S
EGMENT
D
RIVERS
/
C
OMMON
D
RIVERS
............................................................................................................. 19
6.6
G
RAPHIC
D
ISPLAY
D
ATA
RAM
(GDDRAM) ...................................................................................................... 20
6.7
SEG/COM
D
RIVING BLOCK
................................................................................................................................ 21
6.8
P
OWER
ON
AND
OFF
SEQUENCE
......................................................................................................................... 22
7
MAXIMUM RATINGS ............................................................................................................. 23
8
DC CHARACTERISTICS ........................................................................................................ 24
9
AC CHARACTERISTICS ........................................................................................................ 25
10
APPLICATION EXAMPLE.................................................................................................. 31
Solomon Systech
Dec 2015
P 4/32
Rev 1.0
SSD1317
TABLES
T
ABLE
3-1:
O
RDERING
I
NFORMATION
................................................................................................................................... 6
T
ABLE
5-1:
P
IN
D
ESCRIPTION
................................................................................................................................................ 8
T
ABLE
5-2
:
B
US
I
NTERFACE SELECTION
............................................................................................................................... 8
T
ABLE
6-1
:
MCU
INTERFACE ASSIGNMENT UNDER DIFFERENT BUS INTERFACE MODE
....................................................... 11
T
ABLE
6-2
:
C
ONTROL PINS OF
6800
INTERFACE
.................................................................................................................. 11
T
ABLE
6-3
:
C
ONTROL PINS OF
8080
INTERFACE
.................................................................................................................. 13
T
ABLE
6-4
:
C
ONTROL PINS OF
4-
WIRE
S
ERIAL INTERFACE
.................................................................................................. 13
T
ABLE
6-5
:
C
ONTROL PINS OF
3-
WIRE
S
ERIAL INTERFACE
.................................................................................................. 14
T
ABLE
7-1
:
M
AXIMUM
R
ATINGS
........................................................................................................................................ 23
T
ABLE
8-1
:
DC
C
HARACTERISTICS
..................................................................................................................................... 24
T
ABLE
9-1
:
AC
C
HARACTERISTICS
..................................................................................................................................... 25
T
ABLE
9-2
:
6800-S
ERIES
MCU
P
ARALLEL
I
NTERFACE
T
IMING
C
HARACTERISTICS
........................................................... 26
T
ABLE
9-3
:
8080-S
ERIES
MCU
P
ARALLEL
I
NTERFACE
T
IMING
C
HARACTERISTICS
........................................................... 27
T
ABLE
9-4
:
S
ERIAL
I
NTERFACE
T
IMING
C
HARACTERISTICS
(4-
WIRE
SPI) .......................................................................... 28
T
ABLE
9-5
:
S
ERIAL
I
NTERFACE
T
IMING
C
HARACTERISTICS
(3-
WIRE
SPI) .......................................................................... 29
T
ABLE
9-6
:
I
2
C
I
NTERFACE
T
IMING
C
HARACTERISTICS
...................................................................................................... 30
SSD1317
Rev 1.0
P 5/32
Dec 2015
Solomon Systech
FIGURES
F
IGURE
4-1:
SSD1317
B
LOCK
D
IAGRAM
.............................................................................................................................. 7
F
IGURE
6-1
:
D
ATA READ BACK PROCEDURE
-
INSERTION OF DUMMY READ
........................................................................ 12
F
IGURE
6-2
:
E
XAMPLE OF
W
RITE PROCEDURE IN
8080
PARALLEL INTERFACE MODE
.......................................................... 12
F
IGURE
6-3
:
E
XAMPLE OF
R
EAD PROCEDURE IN
8080
PARALLEL INTERFACE MODE
........................................................... 12
F
IGURE
6-4
:
D
ISPLAY DATA READ BACK PROCEDURE
-
INSERTION OF DUMMY READ
.......................................................... 13
F
IGURE
6-5
:
W
RITE PROCEDURE IN
4-
WIRE
S
ERIAL INTERFACE MODE
................................................................................ 14
F
IGURE
6-6
:
W
RITE PROCEDURE IN
3-
WIRE
S
ERIAL INTERFACE MODE
................................................................................ 14
F
IGURE
6-7
:
I
2
C-
BUS DATA FORMAT
................................................................................................................................... 16
F
IGURE
6-8
:
D
EFINITION OF THE
S
TART AND
S
TOP
C
ONDITION
.......................................................................................... 17
F
IGURE
6-9
:
D
EFINITION OF THE ACKNOWLEDGEMENT CONDITION
.................................................................................... 17
F
IGURE
6-10
:
D
EFINITION OF THE DATA TRANSFER CONDITION
.......................................................................................... 17
F
IGURE
6-11
:
O
SCILLATOR
C
IRCUIT AND
D
ISPLAY
T
IME
G
ENERATOR
............................................................................... 18
F
IGURE
6-12
:
S
EGMENT
O
UTPUT
W
AVEFORM IN THREE PHASES
........................................................................................ 19
F
IGURE
6-13
:
GDDRAM
PAGES STRUCTURE
...................................................................................................................... 20
F
IGURE
6-14
:
E
NLARGEMENT OF
GDDRAM
(N
O ROW RE
-
MAPPING AND COLUMN
-
REMAPPING
) ....................................... 20
F
IGURE
6-15
:
I
REF
C
URRENT
S
ETTING BY
R
ESISTOR
V
ALUE
............................................................................................... 21
F
IGURE
6-16
:
T
HE
P
OWER
ON
SEQUENCE
........................................................................................................................... 22
F
IGURE
6-17
:
T
HE
P
OWER
OFF
SEQUENCE
......................................................................................................................... 22
F
IGURE
9-1
:
6800-
SERIES
MCU
PARALLEL INTERFACE CHARACTERISTICS
......................................................................... 26
F
IGURE
9-2
:
8080-
SERIES PARALLEL INTERFACE CHARACTERISTICS
................................................................................... 27
F
IGURE
9-3
:
S
ERIAL INTERFACE CHARACTERISTICS
(4-
WIRE
SPI) ...................................................................................... 28
F
IGURE
9-4
:
S
ERIAL INTERFACE CHARACTERISTICS
(3-
WIRE
SPI) ...................................................................................... 29
F
IGURE
9-5
:
I
2
C
INTERFACE
T
IMING CHARACTERISTICS
..................................................................................................... 30
F
IGURE
10-1
:
A
PPLICATION
E
XAMPLE OF
SSD1317Z ........................................................................................................ 31
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