杰理AC6325F方案原理图
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2024-01-07
09:52:21
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1 2 3 4
A
B
C
D
4321
D
C
B
A
POWER
MCU
TF
、
LED
注：原理图中注释说明设计时需特别注意
Mic
C11
NC
C12
NC
BT_OSCO BT_OSCI
Y1 24M
BT_OSCO
BT_OSCI
C20 104
C19 104
RTCVDD
BT_AVDD
VBAT
C18
NC
L3
NC
BT_ANT1
BT_RF
CD
10
D2
9
D3/CS
1
CMD/DI
2
VDD
4
CLK
5
VSS
6
D0/DO
7
D1
8
VSS
3
WP
11
SHEET
12
TF1
TF
R3
4.7R
C25
NC
SD_CMD
SD_DAT
+3.3V
SD_CLK
R6
3.3K
SD_DET
GND
VCOM
DACVDD
AGND
DACL
MIC
DACR C23
104
C24 104
C22 224
C21 224
+3.3V
+
M1
MIC
C6
NC
C16
104/224
MIC
R4
6.8K
C5
NC
DACVDD
SD_CMD
SD_DAT/DM
SD_CLK
晶振选型：
封装：可兼容3225，M49S，HC49S等不同封装
要求：稳定性、一致性要好，频偏偏差：±10PPM以内
电容：晶振匹配电容位置请预留
GND
5
GND
4
DP
3
DM
2
6
+5V
1
6
6
6
MUSB1
BT1
3.4V~4.2V
VBAT
+5V
GND、AGND在电源入口处短接在一起！
R2
4.7R
ADKEY
LED_R/B
D4
1N4007
VBAT
C17
NC
FMANT
L2
NC
FM_ANT
PC5/SD1CLK
1
PC4/SD1CMD/ADC4
2
VDDIO
12
PWMH2H/ADC9/AUX0R/PB5
13
ADC12/PR2
18
PWM3/ADC8/AUX0L/PB4
14
VCOMO
8
RTCVDD
16
DACVSS
11
DACVDD
9
PA0/MIC/PA3/AUX1L/ADC0
5
USBDM/PC3/SD1DAT/ADC10
3
USBDP
4
BT_OSCI
23
BT_OSCO
24
BT_RF
20
VSSIO
22
BT_AVDD
19
DACR
6
DACL
7
VCOM
10
ADC12/PR1
17
VBAT
15
FMIP
21
U1
AB/D
FMIP
MUTE
R1
5.1K
5V_DET
程序内部关掉HPVDD
、
SD
1
bypass
2
MODE
3
IN
4
OUT-
5
VDD
6
GND
7
OUT+
8
U2
XPT9971
C15
105
VMCU
SPK+
SPK-
SPK+
SPK-
C10
C13
105
J1
SPK
R8
100K
VMCU
MUTE
C14
NC
R5
12K
AB/D
DACR
104
SD
1
bypass
2
MODE
3
IN
4
OUT-
5
VDD
6
GND
7
OUT+
8
U3
XPT9971
C31
105
VMCU
SPK+
SPK-
SPK+
SPK-
C30
C32
105
J2
SPK
R9
100K
VMCU
MUTE
C33
NC
R7
12K
AB/D
DACL
104
+3.3V
R13
22K
R10
24K
R11
33K
R12
51K
S1
P/P
S3
PREV/V-
S4
NEXT/V+
S2
MODE
1.7V
2.0V
0V
2.3V
ADKEY
DP
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