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LPC2214手册
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2014-03-14
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NXP LPC2214数据手册,引脚, 内存
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1. General description
The LPC2212/2214 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation
and embedded trace support, together with 128/256 kB of embedded high-speed flash
memory. A 128-bit wide memory interface and a unique accelerator architecture enable
32-bit code execution at maximum clock rate. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
With their 144-pin package, low power consumption, various 32-bit timers, 8-channel
10-bit ADC, PWM channels and up to nine external interrupt pins these microcontrollers
are particularly suitable for industrial control, medical systems, access control and
point-of-sale. Number of available fast GPIOs ranges from up to 76 pins (with external
memory) through up to 112 pins (single-chip). With a wide range of serial communications
interfaces, they are also very well suited for communication gateways, protocol converters
and embedded soft modems as well as many other general-purpose applications.
Remark: Throughout the data sheet, the term LPC2212/2214 will apply to devices with
and without the /00 or /01 suffixes. The /00 or the /01 suffix will be used to differentiate
from other devices only when necessary.
2. Features and benefits
2.1 Key features brought by LPC2212/2214/01 devices
Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device.
They also allow for a port pin to be read at any time regardless of its function.
Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are
5 V tolerant when configured for digital I/O function(s).
UART0/1 include fractional baud rate generator, auto-bauding capabilities and
handshake flow-control fully implemented in hardware.
Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.
SPI programmable data length and master mode enhancement.
Diversified Code Read Protection (CRP) enables different security levels to be
implemented. This feature is available in LPC2212/2214/00 devices as well.
General purpose timers can operate as external event counters.
2.2 Key features common for all devices
16/32-bit ARM7TDMI-S microcontroller in a LQFP144 package.
LPC2212/2214
Single-chip 16/32-bit ARM microcontrollers; 128/256 kB
ISP/IAP flash with 10-bit ADC and external memory interface
Rev. 5 — 14 June 2011 Product data sheet
LPC2212_2214 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 14 June 2011 2 of 47
NXP Semiconductors
LPC2212/2214
Single-chip 16/32-bit ARM microcontrollers
16 kB on-chip static RAM and 128/256 kB on-chip flash program memory. 128-bit wide
interface/accelerator enables high speed 60 MHz operation.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software. Flash programming takes 1 ms per 512 B line. Single sector or
full chip erase takes 400 ms.
EmbeddedICE-RT and Embedded Trace interfaces offer real-time debugging with the
on-chip RealMonitor software as well as high speed real-time tracing of instruction
execution.
Eight-channel 10-bit ADC with conversion time as low as 2.44 s.
Two 32-bit timers (with four capture and four compare channels), PWM unit (six
outputs), Real-Time Clock and Watchdog.
Multiple serial interfaces including two UARTs (16C550), Fast I
2
C-bus (400 kbit/s) and
two SPIs.
Vectored Interrupt Controller with configurable priorities and vector addresses.
Configurable external memory interface with up to four banks, each up to 16 MB and
8/16/32-bit data width.
Up to 112 general purpose I/O pins (5 V tolerant). Up to nine edge or level sensitive
external interrupt pins available.
60 MHz maximum CPU clock available from programmable on-chip Phase-Locked
Loop with settling time of 100 s.
On-chip crystal oscillator with an operating range of 1 MHz to 30 MHz.
Two low power modes, Idle and Power-down.
Processor wake-up from Power-down mode via external interrupt.
Individual enable/disable of peripheral functions for power optimization.
Dual power supply:
CPU operating voltage range of 1.65 V to 1.95 V (1.8 V 0.15 V).
I/O power supply range of 3.0 V to 3.6 V (3.3 V 10 %) with 5 V tolerant I/O pads.
3. Ordering information
Table 1. Ordering information
Type number Package
Name Description Version
LPC2212FBD144/01 LQFP144 plastic low profile quad flat package; 144 leads;
body 20 20 1.4 mm
SOT486-1
LPC2214FBD144/01 LQFP144 plastic low profile quad flat package; 144 leads;
body 20 20 1.4 mm
SOT486-1
LPC2212_2214 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 14 June 2011 3 of 47
NXP Semiconductors
LPC2212/2214
Single-chip 16/32-bit ARM microcontrollers
3.1 Ordering options
Table 2. Ordering options
Type number Flash memory RAM Fast GPIO/
SSP/
Enhanced
UART, ADC,
Timer
Temperature range
LPC2212FBD144/01 128 kB 16 kB yes 40 C to +85 C
LPC2214FBD144/01 256 kB 16 kB yes 40 C to +85 C
LPC2212_2214 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 14 June 2011 4 of 47
NXP Semiconductors
LPC2212/2214
Single-chip 16/32-bit ARM microcontrollers
4. Block diagram
(1) Shared with GPIO.
(2) When test/debug interface is used, GPIO/other functions sharing these pins are not available.
(3) SSP interface and high-speed GPIO are available on LPC2212/01 and LPC2214/01 only.
Fig 1. Block diagram
SCL
(1)
P0[30:27],
P0[25:0]
TRST
(2)
TMS
(2)
TCK
(2)
TDI
(2)
TDO
(2)
XTAL2
XTAL1
EINT[3:0]
(1)
AIN[3:0]
(1)
AIN[7:4]
(1)
PWM[6:1]
(1)
AHB BRIDGE
PLL
PWM0
ARM7TDMI-S
LPC2212
LPC2214
RESET
4 × CAP0
(1)
4 × CAP1
(1)
4 × MAT0
(1)
4 × MAT1
(1)
P1[31:16],
P1[1:0]
P2[31:0]
P3[31:0]
SDA
(1)
DSR1
(1)
, CTS1
(1)
,
RTS1
(1)
, DTR1
(1)
,
DCD1
(1)
, RI1
(1)
RTCK
ARM7 LOCAL BUS
INTERNAL
SRAM
CONTROLLER
INTERNAL
FLASH
CONTROLLER
16 kB
SRAM
128/256 kB
FLASH
EXTERNAL
INTERRUPTS
CAPTURE/
COMPARE
TIMER 0/TIMER 1
A/D CONVERTER
GENERAL
PURPOSE I/O
TEST/DEBUG
INTERFACE
EMULATION
TRACE MODULE
system
clock
SYSTEM
FUNCTIONS
VECTORED
INTERRUPT
CONTROLLER
AHB
DECODER
I
2
C-BUS SERIAL
INTERFACE
AHB TO APB
BRIDGE
APB
DIVIDER
SPI1/SSP
(3)
SERIAL
INTERFACE
UART0/UART1
WATCHDOG
TIMER
SYSTEM CONTROL
REAL-TIME CLOCK
002aad181
V
DD(3V3)
V
SS
V
DD(1V8)
SCK1
(1)
MOSI1
(1)
MISO1
(1)
SSEL1
(1)
SPI0 SERIAL
INTERFACE
SCK0
(1)
MOSI0
(1)
MISO0
(1)
SSEL0
(1)
EXTERNAL MEMORY
CONTROLLER
BLS[3:0]
(1)
OE, WE
(1)
CS[3:0]
(1)
A[23:0]
(1)
D[31:0]
(1)
RXD[1:0]
(1)
TXD[1:0]
(1)
AMBA Advanced High-performance
Bus (AHB)
P0, P1
HIGH-SPEED
GPI/O
(3)
48 PINS TOTAL
LPC2212_2214 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 14 June 2011 5 of 47
NXP Semiconductors
LPC2212/2214
Single-chip 16/32-bit ARM microcontrollers
5. Pinning information
5.1 Pinning
(1) Pin configuration is identical for devices with and without /00 and /01 suffixes.
Fig 2. Pin configuration (LQFP144)
LPC2212
LPC2214
(1)
108
37
72
144
109
73
1
36
002aad182
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