基于stc12c5a60s2的nrf24l01通信

#include"STC12C5A60S2.H" #define TX_ADR_WIDTH 0x05 // 5 bytes TX(RX) address width #define TX_PLOAD_WIDTH 0x16 // 32 bytes TX payload #define READ_REG 0x00 // Define read command to register #define WRITE_REG 0x20 // Define write command to register #define RD_RX_PLOAD 0x61 // Define RX payload register address #define WR_TX_PLOAD 0xA0 // Define TX payload register address #define FLUSH_TX 0xE1 // Define flush TX register command #define FLUSH_RX 0xE2 // Define flush RX register command #define REUSE_TX_PL 0xE3 // Define reuse TX payload register command #define NOP 0xFF // Define No Operation, might be used to read status register #define TX_ADDRESS 0X01 //***************************************************// // SPI(nRF24L01) registers(addresses) #define CONFIG 0x00 // 'Config' register address #define EN_AA 0x01 // 'Enable Auto Acknowledgment' register address #define EN_RXADDR 0x02 // 'Enabled RX addresses' register address #define SETUP_AW 0x03 // 'Setup address width' register address #define SETUP_RETR 0x04 // 'Setup Auto. Retrans' register address #define RF_CH 0x05 // 'RF channel' register address #define RF_SETUP 0x06 // 'RF setup' register address #define STATUS 0x07 // 'Status' register address #define OBSERVE_TX 0x08 // 'Observe TX' register address #define CD 0x09 // 'Carrier Detect' register address #define RX_ADDR_P0 0x0A // 'RX address pipe0' register address #define RX_ADDR_P1 0x0B // 'RX address pipe1' register address #define RX_ADDR_P2 0x0C // 'RX address pipe2' register address #define RX_ADDR_P3 0x0D // 'RX address pipe3' register address #define RX_ADDR_P4 0x0E // 'RX address pipe4' register address #define RX_ADDR_P5 0x0F // 'RX address pipe5' register address #define TX_ADDR 0x10 // 'TX address' register address #define RX_PW_P0 0x11 // 'RX payload width, pipe0' register address #define RX_PW_P1 0x12 // 'RX payload width, pipe1' register address #define RX_PW_P2 0x13 // 'RX payload width, pipe2' register address #define RX_PW_P3 0x14 // 'RX payload width, pipe3' register address #define RX_PW_P4 0x15 // 'RX payload width, pipe4' register address #define RX_PW_P5 0x16 // 'RX payload width, pipe5' register address #define FIFO_STATUS 0x17 // 'FIFO Status Register' register address #define STA_MARK_RX 0X40 #define STA_MARK_TX 0X20 #define STA_MARK_MX 0X10 sbit IRQ = P1^1; sbit CE = P1^0; sbit CSN= P1^2; sbit SCK= P1^7; sbit MOSI= P1^5; sbit MISO= P1^6; #define uchar unsigned char int rx_buf[TX_PLOAD_WIDTH]; int tx_buf[TX_PLOAD_WIDTH]={0X01,0X02,0X03,0X04,0X05,0X06,0X07,0X08,0X09,0X0A,0X0B,0X0C,0X0D,0X0E,0X0F}; int const TXADDRESS[TX_ADR_WIDTH] = {0xE7,0xE7,0xE7,0xE7,0xE7}; void delay(long T) { long i,j; for(i=0;i<T;i++) for(j=0;j<4;j++); } unsigned char bdata sta; sbit RX_DR =sta^6; sbit TX_DS =sta^5; sbit MAX_RT =sta^4; /*******************************NRF_24L01.C*******************************/ bdata unsigned char st=0; sbit st_1=st^0; sbit st_2=st^1; sbit st_3=st^2; sbit st_4=st^3; sbit st_5=st^4; sbit st_6=st^5; sbit st_7=st^6; sbit st_8=st^7; bdata unsigned char st1=0; sbit st_11=st1^0; sbit st_12=st1^1; sbit st_13=st1^2; sbit st_14=st1^3; sbit st_15=st1^4; sbit st_16=st1^5; sbit st_17=st1^6; sbit st_18=st1^7; /* uchar SPI_RW(uchar byte) { uchar bit_ctr; for(bit_ctr=0;bit_ctr<8;bit_ctr++) // output 8-bit { MOSI = (byte & 0x80); // output 'byte', MSB to MOSI byte = (byte << 1); // shift next bit into MSB.. SCK = 1; // Set SCK high.. MISO=1; byte |= MISO; // capture current MISO bit SCK = 0; // ..then set SCK low again } return(byte); // return read byte } */ void init_SPI() { CSN=1; CE=0; SCK=0; IRQ=1; } SPI_RW(int byte) { //uchar bit_ctr; st=byte; MOSI=st_8; SCK = 1; st_18=MISO; SCK = 0; MOSI=st_7; SCK = 1; st_17=MISO; SCK = 0; MOSI=st_6; SCK = 1; st_16=MISO; SCK = 0; MOSI=st_5; SCK = 1; st_15=MISO; SCK = 0; MOSI=st_4; SCK = 1; st_14=MISO; SCK = 0; MOSI=st_3; SCK = 1; st_13=MISO; SCK = 0; MOSI=st_2; SCK = 1; st_12=MISO; SCK = 0; MOSI=st_1; SCK = 1; st_11=MISO; SCK = 0; return(st1); // return read byte } SPI_RW_Reg(int reg,int value) { int status; CSN=0; status=SPI_RW(reg); SPI_RW(value); CSN=1; return status; } SPI_Write_Buf(int reg,int *tBuf,int widith) { int buf_val; int i; CSN=0; buf_val=SPI_RW(reg); for(i=0;i<widith;i++) { SPI_RW(*tBuf++); } CSN=1; return buf_val; } SPI_Read_Buf(int reg, int *rBuf, int widith) { int status; int i; CSN = 0; // Set CSN low, init SPI tranaction status = SPI_RW(reg); // Select register to write to and read status byte for(i=0;i<widith;i++) rBuf[i] = SPI_RW(0); // Perform SPI_RW to read byte from nRF24L01 CSN = 1; // Set CSN high again return status; // return nRF24L01 status byte } SPI_Read(int reg) { int reg_val; CSN=0; SPI_RW(reg); reg_val = SPI_RW(0); CSN=1; return reg_val; } void power_off() { CE=0; SPI_RW_Reg(WRITE_REG + CONFIG, 0x0D); CE=1; delay(5); } void initnrf_tx_mode() { power_off(); CE=0; SPI_Write_Buf(WRITE_REG + TX_ADDR, TXADDRESS,TX_ADR_WIDTH); SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TXADDRESS,TX_ADR_WIDTH); SPI_Write_Buf(WR_TX_PLOAD, tx_buf,TX_PLOAD_WIDTH); SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); SPI_RW_Reg(WRITE_REG + RF_CH, 40); SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); CE=1; } void initnrf_rx_mode() { power_off(); CE=0; SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TXADDRESS,TX_ADR_WIDTH); SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); SPI_RW_Reg(WRITE_REG + RF_CH, 40); SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); CE=1; } void SPI_CLR_Reg(int R_T) { CSN = 0; if(R_T==1) // CSN low, init SPI transaction SPI_RW(FLUSH_TX); // ..and write value to it.. else SPI_RW(FLUSH_RX); // ..and write value to it.. CSN = 1; // CSN high again } void ifnnrf_CLERN_ALL() { SPI_CLR_Reg(0); SPI_CLR_Reg(1); SPI_RW_Reg(WRITE_REG+STATUS,0xff); IRQ=1; } /*******************************UART.C*******************************/ void init_uart() { PCON=0X00; SCON=0X50; TMOD=0X20; EA=1; ES=1; TH1 = 0xf8; TL1 = 0xf8; TR1 = 1; } void uart_send(int *value,int widith) { int i; for(i=0;i<widith;i++) { SBUF=*value++; while(TI==0); TI=0; } } main() { init_SPI(); init_uart(); while(1) { initnrf_rx_mode(); IRQ=1; while(IRQ); SPI_Read_Buf(RD_RX_PLOAD,rx_buf,TX_PLOAD_WIDTH); sta=SPI_Read(STATUS); SPI_RW_Reg(WRITE_REG+STATUS,0xff); RX_DR=1; uart_send(rx_buf,TX_PLOAD_WIDTH); ifnnrf_CLERN_ALL(); } }