rtl8309m vlan

/* * Copyright (C) 2012 Realtek Semiconductor Corp. * All Rights Reserved. * * This program is the proprietary software of Realtek Semiconductor * Corporation and/or its licensors, and only be used, duplicated, * modified or distributed under the authorized license from Realtek. * * ANY USE OF THE SOFTWARE OTEHR THAN AS AUTHORIZED UNDER * THIS LICENSE OR COPYRIGHT LAW IS PROHIBITED. * * $Revision: v1.0.1 $ * $Date: 2012-10-23 11:18:41 +0800 $ * * Purpose : asic-level driver implementation for RTL8309N switch * * Feature : This file consists of following modules: * 1) Packet length * 2) Phy * 3) Port isolation * 4) VLAN * 5) CPU port * 6) Qos * 7) ACL * 8) MIB * 9) Mirror * 10) Lookup table * 11) Spanning tree * 12) Dot1x * 13) IGMP * 14) Trap * 15) RMA * 16) Interrupt * 17) Storm filter * 18) RLDP/RLPP * 19) ISP * 20) LED */ #include "rtl8309n_types.h" #include "rtl8309n_asicdrv.h" #include "rtl8309n_asicdrv_ext.h" /*for pc cle test*/ #ifndef RTK_X86_ASICDRV #include "mdcmdio.h" #else extern int r_phy(int,int,int); extern void w_phy(int,int,int,int); #endif #define RTL8309N_GET_REG_ADDR(x, page, phy, reg) \ do { (page) = ((x) & 0xFF0000) >> 16; (phy) = ((x) & 0x00FF00) >> 8; (reg) = ((x) & 0x0000FF);\ } while(0) \ /* Function Name: * rtl8309n_reg_set * Description: * Write Asic Register * Input: * phyad - Specify Phy address (0 ~ 8) * regad - Specify register address (0 ~31) * npage - Specify page number (0 ~17) * value - Value to be write into the register * Output: * none * Return: * SUCCESS * FAILED * Note: * Use this function you could write all configurable registers of RTL8309N, * it is realized by calling functions smiRead and smiWrite which are switch * MDC/MDIO interface access functions. Those two functions use two GPIO * pins to simulate MDC/MDIO timing, and they are based on rtl8651b platform, * to modify them, you can port all asic API to other platform. */ int32 rtl8309n_reg_set(uint32 phyad, uint32 regad, uint32 npage, uint32 value) { #ifdef RTK_X86_ASICDRV uint32 rdata; if ((phyad > RTL8309N_MAX_PORT_ID) || (npage >= RTL8309N_PAGE_NUMBER)) return FAILED; /*Switch to phy register page first*/ w_phy(32, 8, 31, 0x8000); /* write phy page to unavailable page */ rdata = r_phy(32, phyad, 31); rdata &= ~0xFF; rdata |= 0xa; w_phy(32, phyad, 31, rdata); /*write mac page number*/ rdata = r_phy(32, 8, 31); rdata &= ~(0x1 << 15 | 0xff); rdata |= npage; w_phy(32, 8, 31, rdata); /*write mac register value*/ value = value & 0xFFFF; w_phy(32,phyad, regad, value); return SUCCESS; #else uint32 rdata; if ((phyad > RTL8309N_MAX_PORT_ID) || (npage >= RTL8309N_PAGE_NUMBER)) return FAILED; /*switch to phy rigister first*/ smiWrite(8, 31, 0x8000); /*write phy page to unavailable page*/ smiRead(phyad, 31, &rdata); rdata &= ~0xFF; rdata |= 0xa; smiWrite(phyad, 31, rdata); /* switch to MAC page through configuring PHY 8 Register 31 [bit15] */ smiRead(8, 31, &rdata); rdata &= ~(0x1 << 15 | 0xFF); rdata |= npage; smiWrite(8, 31, rdata); /* write mac register value */ value &= 0xFFFF; smiWrite(phyad, regad, value); return SUCCESS; #endif } /* Function Name: * rtl8309n_reg_get * Description: * Read Asic Register * Input: * phyad - Specify Phy address (0 ~ 8) * regad - Specify register address (0 ~31) * npage - Specify page number (0 ~ 17) * Output: * pvalue - The pointer of value read back from register * Return: * SUCCESS * FAILED * Note: * Use this function you could write all configurable registers of RTL8309N, * it is realized by calling functions smiRead and smiWrite which are switch * MDC/MDIO interface access functions. Those two functions use two GPIO * pins to simulate MDC/MDIO timing, and they are based on rtl8651b platform, * to modify them, you can port all asic API to other platform. */ int32 rtl8309n_reg_get(uint32 phyad, uint32 regad, uint32 npage, uint32 *pvalue) { #ifdef RTK_X86_ASICDRV uint32 rdata; if ((phyad > RTL8309N_MAX_PORT_ID) ||(npage >= RTL8309N_PAGE_NUMBER)) return FAILED; /* Select PHY Register Page through configuring PHY 8 Register 31 [bit15] */ rdata = r_phy(32, 8, 31); rdata &= ~(0x1 << 15 | 0xFF); rdata |= npage; w_phy(32, 8, 31, rdata); rdata = r_phy(32, phyad, regad); *pvalue = rdata & 0xFFFF; return SUCCESS; #else uint32 rdata; if ((phyad > RTL8309N_MAX_PORT_ID) || (npage >= RTL8309N_PAGE_NUMBER)) return FAILED; /* Select MAC or PHY page, configure PHY 8 Register 31 bit[15] */ smiRead(8, 31, &rdata); rdata &= ~((0x1 << 15) | 0xFF); /* select mac page, configure phy 8 register 31 bit[0:7]*/ rdata |= npage; smiWrite(8, 31, rdata); /* slelect phy and reg number, write data into register */ smiRead(phyad, regad, &rdata); *pvalue = rdata & 0xFFFF; return SUCCESS; #endif } /* Function Name: * rtl8309n_regbit_set * Description: * Write one bit of Asic Register * Input: * phyad - Specify Phy address (0 ~ 8) * regad - Specify register address (0 ~31) * bit - Specify bit position(0 ~ 15) * npage - Specify page number (0 ~ 17) * value - Value to be write(0, 1) * Output: * none * Return: * SUCCESS * FAILED * Note: * Use this function you could write each bit of all configurable registers of RTL8309N. */ int32 rtl8309n_regbit_set(uint32 phyad, uint32 regad, uint32 bit, uint32 npage, uint32 value) { uint32 rdata; if ((phyad > RTL8309N_MAX_PORT_ID) || (npage >= RTL8309N_PAGE_NUMBER) || (bit > 15) || (value > 1)) return FAILED; rtl8309n_reg_get(phyad, regad, npage, &rdata); if (value) rtl8309n_reg_set(phyad, regad, npage, rdata | (1 << bit)); else rtl8309n_reg_set(phyad, regad, npage, rdata & (~(1 << bit))); return SUCCESS; } /* Function Name: * rtl8309n_regbit_get * Description: * Read one bit of Asic PHY Register * Input: * phyad - Specify Phy address (0 ~6) * regad - Specify register address (0 ~31) * bit - Specify bit position(0 ~ 15) * npage - Specify page number (0 ~17) * Output: * pvalue - The pointer of value read back * Return: * SUCCESS * FAILED * Note: * Use this function you could read each bit of all configurable registers of RTL8309N */ int32 rtl8309n_regbit_get(uint32 phyad, uint32 regad, uint32 bit, uint32 npage, uint32 * pvalue) { uint32 rdata; if ((phyad > RTL8309N_MAX_PORT_ID) || (npage >= RTL8309N_PAGE_NUMBER) || (bit > 15) || (pvalue == NULL)) return FAILED; rtl8309n_reg_get(phyad, regad, npage, &rdata); if (rdata & (0x1 << bit)) *pvalue =1; else *pvalue =0; return SUCCESS; } /* Function Name: * rtl8309n_phyReg_set * Description: * Write PCS page register * Input: * phyad - Specify Phy address (0 ~ 7) * regad - Specify register address (0 ~31) * npage - Specify page number (0 ~ 17) * value - Value to be write into the register * Output: * none * Return: * SUCCESS * FAILED * Note: * Use this function you could write all configurable pcs registers of RTL8309N, * it is realized by calling functions smiRead and smiWrite which are switch * MDC/MDIO interface access functions. Those two functions use two GPIO * pins to simulate MDC/MDIO timing, and they are based on rtl8651b platform, * to modify them, you can port all asic API to other platform. */ int3