/******************************************************************************
FILE : datapage.c
PURPOSE : paged data access runtime routines
MACHINE : Freescale 68HC12 (Target)
LANGUAGE : ANSI-C
HISTORY : 21.7.96 first version created
******************************************************************************/
#include "hidef.h"
#include "non_bank.sgm"
#include "runtime.sgm"
#ifndef __HCS12X__ /* it's different for the HCS12X. See the text below at the #else // __HCS12X__ */
/*
According to the -Cp option of the compiler the
__DPAGE__, __PPAGE__ and __EPAGE__ macros are defined.
If none of them is given as argument, then no page accesses should occur and
this runtime routine should not be used !
To be on the save side, the runtime routines are created anyway.
If some of the -Cp options are given an adapted versions which only covers the
needed cases is produced.
*/
/* if no compiler option -Cp is given, it is assumed that all possible are given : */
/* Compile with option -DHCS12 to activate this code */
#if defined(HCS12) || defined(_HCS12) || defined(__HCS12__) /* HCS12 family has PPAGE register only at 0x30 */
#define PPAGE_ADDR (0x30+REGISTER_BASE)
#ifndef __PPAGE__ /* may be set already by option -CPPPAGE */
#define __PPAGE__
#endif
/* Compile with option -DDG128 to activate this code */
#elif defined DG128 /* HC912DG128 derivative has PPAGE register only at 0xFF */
#define PPAGE_ADDR (0xFF+REGISTER_BASE)
#ifndef __PPAGE__ /* may be set already by option -CPPPAGE */
#define __PPAGE__
#endif
#elif defined(HC812A4)
/* all setting default to A4 already */
#endif
#if !defined(__EPAGE__) && !defined(__PPAGE__) && !defined(__DPAGE__)
/* as default use all page registers */
#define __DPAGE__
#define __EPAGE__
#define __PPAGE__
#endif
/* modify the following defines to your memory configuration */
#define EPAGE_LOW_BOUND 0x400u
#define EPAGE_HIGH_BOUND 0x7ffu
#define DPAGE_LOW_BOUND 0x7000u
#define DPAGE_HIGH_BOUND 0x7fffu
#define PPAGE_LOW_BOUND (DPAGE_HIGH_BOUND+1)
#define PPAGE_HIGH_BOUND 0xBFFFu
#define REGISTER_BASE 0x0u
#ifndef DPAGE_ADDR
#define DPAGE_ADDR (0x34u+REGISTER_BASE)
#endif
#ifndef EPAGE_ADDR
#define EPAGE_ADDR (0x36u+REGISTER_BASE)
#endif
#ifndef PPAGE_ADDR
#define PPAGE_ADDR (0x35u+REGISTER_BASE)
#endif
/*
The following parts about the defines are assumed in the code of _GET_PAGE_REG :
- the memory region controlled by DPAGE is above the area controlled by the EPAGE and
below the area controlled by the PPAGE.
- the lower bound of the PPAGE area is equal to be the higher bound of the DPAGE area + 1
*/
#if EPAGE_LOW_BOUND >= EPAGE_HIGH_BOUND || EPAGE_HIGH_BOUND >= DPAGE_LOW_BOUND || DPAGE_LOW_BOUND >= DPAGE_HIGH_BOUND || DPAGE_HIGH_BOUND >= PPAGE_LOW_BOUND || PPAGE_LOW_BOUND >= PPAGE_HIGH_BOUND
#error /* please adapt _GET_PAGE_REG for this non default page configuration */
#endif
#if DPAGE_HIGH_BOUND+1 != PPAGE_LOW_BOUND
#error /* please adapt _GET_PAGE_REG for this non default page configuration */
#endif
/* this module does either control if any access is in the bounds of the specified page or */
/* ,if only one page is specified, just use this page. */
/* This behavior is controlled by the define USE_SEVERAL_PAGES. */
/* If !USE_SEVERAL_PAGES does increase the performance significantly */
/* NOTE : When !USE_SEVERAL_PAGES, the page is also set for accesses outside of the area controlled */
/* by this single page. But this is should not cause problems because the page is restored to the old value before any other access could occur */
#if !defined(__DPAGE__) && !defined(__EPAGE__) && !defined(__PPAGE__)
/* no page at all is specified */
/* only specifying the right pages will speed up these functions a lot */
#define USE_SEVERAL_PAGES 1
#elif defined(__DPAGE__) && defined(__EPAGE__) || defined(__DPAGE__) && defined(__PPAGE__) || defined(__EPAGE__) && defined(__PPAGE__)
/* more than one page register is used */
#define USE_SEVERAL_PAGES 1
#else
#define USE_SEVERAL_PAGES 0
#if defined(__DPAGE__) /* check which pages are used */
#define PAGE_ADDR PPAGE_ADDR
#elif defined(__EPAGE__)
#define PAGE_ADDR EPAGE_ADDR
#elif defined(__PPAGE__)
#define PAGE_ADDR PPAGE_ADDR
#else /* we do not know which page, decide it at runtime */
#error /* must not happen */
#endif
#endif
#if USE_SEVERAL_PAGES /* only needed for several pages support */
/*--------------------------- _GET_PAGE_REG --------------------------------
Runtime routine to detect the right register depending on the 16 bit offset part
of an address.
This function is only used by the functions below.
Depending on the compiler options -Cp different versions of _GET_PAGE_REG are produced.
Arguments :
- Y : offset part of an address
Result :
if address Y is controlled by a page register :
- X : address of page register if Y is controlled by an page register
- Zero flag cleared
- all other registers remain unchanged
if address Y is not controlled by a page register :
- Zero flag is set
- all registers remain unchanged
--------------------------- _GET_PAGE_REG ----------------------------------*/
#if defined(__DPAGE__)
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
static void NEAR _GET_PAGE_REG(void) { /*lint -esym(528, _GET_PAGE_REG) used in asm code */
__asm {
L_DPAGE:
CPY #DPAGE_LOW_BOUND ;// test of lower bound of DPAGE
#if defined(__EPAGE__)
BLO L_EPAGE ;// EPAGE accesses are possible
#else
BLO L_NOPAGE ;// no paged memory below accesses
#endif
CPY #DPAGE_HIGH_BOUND ;// test of higher bound DPAGE/lower bound PPAGE
#if defined(__PPAGE__)
BHI L_PPAGE ;// EPAGE accesses are possible
#else
BHI L_NOPAGE ;// no paged memory above accesses
#endif
FOUND_DPAGE:
LDX #DPAGE_ADDR ;// load page register address and clear zero flag
RTS
#if defined(__PPAGE__)
L_PPAGE:
CPY #PPAGE_HIGH_BOUND ;// test of higher bound of PPAGE
BHI L_NOPAGE
FOUND_PPAGE:
LDX #PPAGE_ADDR ;// load page register address and clear zero flag
RTS
#endif
#if defined(__EPAGE__)
L_EPAGE:
CPY #EPAGE_LOW_BOUND ;// test of lower bound of EPAGE
BLO L_NOPAGE
CPY #EPAGE_HIGH_BOUND ;// test of higher bound of EPAGE
BHI L_NOPAGE
FOUND_EPAGE:
LDX #EPAGE_ADDR ;// load page register address and clear zero flag
RTS
#endif
L_NOPAGE:
ORCC #0x04 ;// sets zero flag
RTS
}
}
#else /* !defined(__DPAGE__) */
#if defined( __PPAGE__ )
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
static void NEAR _GET_PAGE_REG(void) { /*lint -esym(528, _GET_PAGE_REG) used in asm code */
__asm {
L_PPAGE:
CPY #PPAGE_LOW_BOUND ;// test of lower bound of PPAGE
#if defined( __EPAGE__ )
BLO L_EPAGE
#else
BLO L_NOPAGE ;// no paged memory below
#endif
CPY #PPAGE_HIGH_BOUND ;// test of higher bound PPAGE
BHI L_NOPAGE
FOUND_PPAGE:
LDX #PPAGE_ADDR ;// load page register address and clear zero flag
RTS
#if defined( __EPAGE__ )
L_EPAGE:
CPY #EPAGE_LOW_BOUND ;// test of lower bound of EPAGE
BLO L_NOPAGE
CPY #EPAGE_HIGH_BOUND ;// test of higher bound of EPAGE
BHI L_NOPAGE
FOUND_EPAGE:
LDX #EPAGE_ADDR ;// load page register address and clear zero flag
RTS
#endif
L_NOPAGE: ;// not in any allowed page area
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基于 MC9S12X128 AD采集程序
共93个文件
o:17个
h:17个
c:15个
5星 · 超过95%的资源 需积分: 9 9 下载量 53 浏览量
2013-06-29
10:09:13
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本AD采集程序,设置精度8位,采集电压范围0~5V,并且采集的结果在LCD1602上显示
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ADC测试.rar (93个子文件)
ADC测试
AD
bin
Project.abs 202KB
Project.abs.glo 3KB
Project.abs.s19 3KB
Project.map 109KB
cmd
TBDML_Postload.cmd 59B
TBDML_Preload.cmd 60B
TBDML_Reset.cmd 60B
TBDML_Vppoff.cmd 77B
TBDML_Erase_unsecure_hcs12xe.cmd 1KB
TBDML_Startup.cmd 59B
TBDML_Vppon.cmd 78B
Default.mem 161B
MEM_FREE.b2836.20120709.163801A.dump 31KB
Project_1_Data
Standard
ObjectCode
main.c.o 9KB
LCD1602.c.o 8KB
delay.c.o 4KB
MC9S12XS128.c.o 160KB
LCD5110.c.o 17KB
datapage.c.o 14KB
Start12.c.o 5KB
numToStr.c.o 6KB
12XSConfig.c.o 33KB
TargetDataWindows.tdt 523KB
CWSettingsWindows.stg 5KB
C_Layout.hwl 855B
prm
Project.prm 6KB
burner.bbl 10KB
TBDML.ini 3KB
Sources
delay.c 226B
12XSConfig.c 7KB
5110code.h 9KB
derivative.h 262B
main.c 2KB
5110.h 7KB
LCD5110.h 1KB
LCD5110.c 5KB
LCD1602.c 2KB
Start12.c 22KB
AD_caiji.h 378B
numToStr.h 122B
delay.h 144B
datapage.c 67KB
LCD1602.h 553B
12XSConfig.h 167B
numToStr.c 1KB
Project_1.mcp 57KB
freescale program
bin
Project.abs 180KB
Project.abs.glo 910B
Project.abs.s19 906B
Project.map 96KB
cmd
TBDML_Postload.cmd 59B
TBDML_Preload.cmd 60B
TBDML_Reset.cmd 60B
TBDML_Vppoff.cmd 77B
TBDML_Erase_unsecure_hcs12xe.cmd 1KB
TBDML_Startup.cmd 59B
TBDML_Vppon.cmd 78B
Default.mem 161B
Project_1_Data
Standard
ObjectCode
main.c.o 6KB
delay.c.o 4KB
MC9S12XS128.c.o 160KB
LCD5110.c.o 16KB
datapage.c.o 14KB
Start12.c.o 6KB
numToStr.c.o 6KB
12XSConfig.c.o 33KB
TargetDataWindows.tdt 495KB
CWSettingsWindows.stg 4KB
C_Layout.hwl 855B
prm
Project.prm 6KB
burner.bbl 10KB
TBDML.ini 3KB
Sources
delay.c 225B
12XSConfig.c 7KB
5110code.h 9KB
derivative.h 262B
main.c 1KB
5110.h 7KB
LCD5110.h 1KB
LCD5110.c 5KB
Start12.c 22KB
AD_caiji.h 378B
numToStr.h 122B
delay.h 144B
datapage.c 67KB
12XSConfig.h 170B
numToStr.c 1KB
Project_1.mcp 57KB
IDE27A3.tmp 0B
IDE6C5F.tmp 0B
IDE27A3.tmp 0B
MEM_FREE.b2836.20120709.163802A.dump 37KB
IDE6C5F.tmp 0B
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- 1
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