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DAC7678

Data Buffer A

DAC Register A

Buffer Control Register Control

Control Logic

Input Control Logic

Power-Down

Control Logic

REFIN REFOUT

12-Bit DAC

CLRLDACADDR0

SDA

SCL

2.5V

Reference

Data Buffer B

DAC Register B

Data Buffer C

Data Buffer D

Data Buffer E

Data Buffer F

Data Buffer G

DAC Register C

DAC Register D

DAC Register E

DAC Register F

DAC Register G

V H

OUT

Data Buffer H

DAC Register H

V G

OUT

V F

OUT

V E

OUT

V D

OUT

V C

OUT

V B

OUT

V A

OUT

GNDADDR1

12-Bit DAC

RSTSEL

DAC7678

www.ti.com

SBAS493C –FEBRUARY 2010–REVISED JANUARY 2014

12-Bit, Octal-Channel, Ultra-Low Glitch, Voltage Output, Two-Wire Interface

Digital-to-Analog Converter with 2.5V Internal Reference

Check for Samples: DAC7678

FEATURES

APPLICATIONS

• Relative Accuracy:

• Portable Instrumentation

– 1 LSB INL • Closed-Loop Servo-Control

• Glitch Energy: 0.15nV-s • Process Control

• Internal Reference: • Data Acquisition Systems

– 2.5V Reference Voltage (disabled by • Programmable Attenuation

default)

• PC Peripherals

– ±5mV Initial Accuracy (max)

DESCRIPTION

– 5ppm/°C Temperature Drift (typ)

The DAC7678 is a low-power, voltage-output, octal

– 25ppm/°C Temperature Drift (max)

channel, 12-bit digital-to-analog converter (DAC). The

– 20mA Sink/Source Capability

DAC7678 includes a 2.5V internal reference (disabled

• Power-On Reset to Zero Scale or Midscale

by default), giving a full-scale output voltage range of

5V. The internal reference has an initial accuracy of

– Devices in the TSSOP Package Reset to

±5mV and can source up to 20mA at the

Zero Scale

REFIN

REFOUT

pin. The device is monotonic,

– Devices in the QFN Package Reset to Zero

provides very good linearity, and minimizes undesired

Scale or Midscale

code-to-code transient voltages (glitch).

• Ultra-Low Power Operation: 0.13mA/Channel

The DAC7678 uses a versatile, 2-wire serial interface

at 5V (without internal reference current)

that is I

C-compatible and operates at clock rates of

• Wide Power-Supply Range: +2.7V to +5.5V

up to 3.4MHz. Multiple devices can share the same

bus.

• 2-Wire Serial Interface ( I

C™ compatible)

• On-Chip Output Buffer Amplifier with Rail-to-

The DAC7678 incorporates a power-on-reset circuit

that ensures the DAC output powers up to either

Rail Operation

zero-scale or mid-scale until a valid code is written to

• Temperature Range: –40°C to +125°C

the device. These devices contain a power-down

feature, accessed over the serial interface that

reduces the current consumption of the device to

typically 0.42μA at 5V. Power consumption (including

internal reference) is typically 3.56mW at 3V,

reducing to 0.68μW in power-down mode. The low

power consumption, internal reference, and small

footprint make this device ideal for portable, battery-

operated equipment. The DAC7678 is drop-in and

functionally compatible with DAC5578, DAC6578,

and DAC7578. All devices are available in a 4x4

QFN-24 package and a TSSOP-16 package.

RELATED DEVICES 8-BIT 10-BIT 12-BIT

Pin- and Function-Compatible

— — DAC7678

(w/internal reference)

Pin- and Function-Compatible DAC5578 DAC6578 DAC7578

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

C is a trademark of NXP Semiconductors.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

DAC7678

SBAS493C –FEBRUARY 2010–REVISED JANUARY 2014

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE/ORDERING INFORMATION

(1)

MAXIMUM MAXIMUM MAXIMUM SPECIFIED

PACKAGE- PACKAGE PACKAGE

PRODUCT RELATIVE DIFFERENTIAL REFERENCE DRIFT TEMPERATURE

LEAD DESIGNATOR MARKING

ACCURACY (LSB) NONLINEARITY (LSB) (ppm/°C) RANGE

TSSOP-16 PW

DAC7678 ±1 ±0.25 25 –40°C to +125°C DAC7678

QFN-24 RGE

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)

Over operating free-air temperature range, unless otherwise noted.

DAC7678 UNIT

to GND –0.3 to +6 V

Digital input voltage to GND –0.3 to +AV

+ 0.3 V

OUT

to GND –0.3 to +AV

+ 0.3 V

REFIN

REFOUT

to GND –0.3 to +AV

+ 0.3 V

Operating temperature range –40 to +125 °C

Storage temperature range –65 to +150 °C

Junction temperature range (T

max) +150 °C

Power dissipation (T

max – T

)/θ

(1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute

maximum conditions for extended periods may affect device reliability.

THERMAL INFORMATION

DAC7678

THERMAL METRIC

(1)

UNITS

PW (16 PINS) RGE (24 PINS)

Junction-to-ambient thermal resistance 111.9 33.7

JCtop

Junction-to-case (top) thermal resistance 33.3 16.9

Junction-to-board thermal resistance 52.4 7.4

°C/W

Junction-to-top characterization parameter 2 0.5

Junction-to-board characterization parameter 51.2 7.1

JCbot

Junction-to-case (bottom) thermal resistance n/a 1.7

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

Product Folder Links: DAC7678

DAC7678

SBAS493C –FEBRUARY 2010–REVISED JANUARY 2014

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

At AV

= 2.7V to 5.5V, External Reference Used, and over –40°C to +125°C, unless otherwise noted.

DAC7678

PARAMETER TEST CONDITIONS UNIT

MIN TYP MAX

INTERNAL REFERENCE

Output voltage T

= +25°C 2.495 2.5 2.505 V

Initial accuracy T

= +25°C –5 ±0.1 5 mV

Output voltage temperature drift

(4)

5 25 ppm/°C

Output voltage noise T

= +25°C, f = 0.1Hz to 10Hz 15 μV

= +25°C, f = 1kHz, C

= 0μF 250

Output voltage noise density

nV/√Hz

(high-frequency noise)

= +25°C, f = 1MHz, C

= 0μF 50

Sourcing, T

= +25°C 500 μV/mA

Load regulation

(5)

Sinking, T

= +25°C 200 μV/mA

Output current load capability

(4)

±20 mA

Line regulation T

= +25°C 80 μV/V

Long-term stability/drift (aging)

(5)

= +25°C, time = 0 to 2160 hours 100 ppm

First cycle 200 ppm

Thermal hysteresis

(5)

Additional cycles 50 ppm

= 5.5V 420 μA

Internal reference current consumption

= 3.6V 400 μA

External V

REF

= 2.5V (when internal reference is disabled), all

External reference current 60 μA

eight channels active

REFIN

REFOUT

pin reference input range 0 AV

Reference input impedance Reference disabled 42 kΩ

LOGIC INPUTS

(4)

Input current ±1 μA

L Logic input LOW voltage 2.7V ≤ AV

≤ 5.5V GND–0.3 0.3×AV

H Logic input HIGH voltage 2.7V ≤ AV

≤ 5.5V 0.7×AV

+0.3 V

Pin capacitance 1.5 3 pF

POWER REQUIREMENTS

2.7 5.5 V

= 3.6V to 5.5V, V

H = AV

and V

L = GND 1.02 1.4 mA

Normal mode, internal

reference switched off

= 2.7V to 3.6V, V

H = AV

and V

L = GND 0.86 1.3 mA

= 3.6V to 5.5V, V

H = AV

and V

L = GND 1.49 2.2 mA

Normal mode, internal

(6)

reference switched on

= 2.7V to 3.6V, V

H = AV

and V

L = GND 1.32 2 mA

= 3.6V to 5.5V, V

H = AV

and V

L = GND 0.42 6 μA

All power-down modes

= 2.7V to 3.6V, V

H = AV

and V

L = GND 0.25 4.7 μA

= 3.6V to 5.5V, V

H = AV

and V

L = GND 3.67 7.7 mW

Normal mode, internal

reference switched off

= 2.7V to 3.6V, V

H = AV

and V

L = GND 2.32 4.68 mW

= 3.6V to 5.5V, V

H = AV

and V

L = GND 5.36 12.1 mW

Power Normal mode, internal

dissipation

(6)

reference switched on

= 2.7V to 3.6V, V

H = AV

and V

L = GND 3.56 7.2 mW

= 3.6V to 5.5V, V

H = AV

and V

L = GND 1.51 33 μW

All power-down modes

= 2.7V to 3.6V, V

H = AV

and V

L = GND 0.68 16.92 μW

TEMPERATURE RANGE

Specified performance –40 +125 °C

(4) Specified by design or characterization; not production tested.

(5) Explained in more detail in the Application Information section of this data sheet.

(6) Input code = midscale, no load.

Product Folder Links: DAC7678

V A

OUT

V C

OUT

V E

OUT

V G

OUT

GND

V B

OUT

V D

OUT

V F

OUT

V H

OUT

DAC7678

7 8 9 10 11 12

24 23 22 21

V /V

REFIN REFOUT

RSTSEL

ADDR1

ADDR0

CLR

LDAC

TWOC

SCL

SDA

(Thermal pad)

SCL

SDA

GND

V B

OUT

V D

OUT

V F

OUT

V H

OUT

CLR

LDAC

ADDR0

V A

OUT

V C

OUT

V E

OUT

V G

OUT

V /V

REFIN REFOUT

DAC7678

www.ti.com

SBAS493C –FEBRUARY 2010–REVISED JANUARY 2014

PIN CONFIGURATIONS

PW PACKAGE

RGE PACKAGE

TSSOP-16

QFN-24

(TOP VIEW)

(1) It is recommended to connect the thermal

pad to GND for better thermal dissipation.

PIN DESCRIPTIONS

16-PIN 24-PIN NAME DESCRIPTION

1 22 LDAC Load DACs.

2 11 ADDR0 Three-state address input 0

3 2 AV

Power-supply input, 2.7V to 5.5V

4 3 V

OUT

A Analog output voltage from DAC A

5 4 V

OUT

C Analog output voltage from DAC C

6 5 V

OUT

E Analog output voltage from DAC E

7 6 V

OUT

G Analog output voltage from DAC G

REFIN

8 8 Positive reference input or reference output of 2.5V, if internal reference used.

REFOUT

9 12 CLR Asynchronous clear input

10 13 V

OUT

H Analog output voltage from DAC H

11 14 V

OUT

F Analog output voltage from DAC F

12 15 V

OUT

D Analog output voltage from DAC D

13 16 V

OUT

B Analog output voltage from DAC B

14 17 GND Ground reference point for all circuitry on the device

Serial data input. Data are clocked into or out of the input register. This pin is a bidirectional, open-

15 19 SDA

drain data line that should be connected to the supply voltage with an external pull-up resistor.

16 20 SCL Serial clock input. Data can be transferred at rates up to 3.4MHz. Schmitt-trigger logic input.

— 1 NC Not internally connected.

— 7 NC Not internally connected.

— 9 RSTSEL Reset select pin. RSTSEL high resets device to mid-scale; RSTSEL low resets device to zero-scale.

— 10 ADDR1 Three-state address input 1

— 18 NC Not internally connected.

Twos complement select. If the TWOC pin is pulled high, the DAC registers use twos complement

— 21 TWOC

format; if TWOC is pulled low, the DAC registers use straight binary format.

— 23 NC Not internally connected.

— 24 NC Not internally connected.

Product Folder Links: DAC7678

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