A
B
C
D
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
HM42-CP
SC
Table of Content
A3
2 72Friday, January 22, 2010
<Variant Name>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
HM42-CP
SC
Table of Content
A3
2 72Friday, January 22, 2010
<Variant Name>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
HM42-CP
SC
Table of Content
A3
2 72Friday, January 22, 2010
<Variant Name>
SPKR
Name Schematics Notes
HAD_DOCK_EN#
/GPIO[33]
Low (0):
High (1) :
HDA_SDO
Weak internal pull-down. Do not pull high.
HDA_SYNC
CFG[0]
CFG[7]
INIT3_3V#
Weak internal pull-down. Do not pull high.
GNT3#/
GPIO55
Default Mode:
Low (0) = Top Block Swap Mode
GNT0#,
GNT1#
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.
Processor StrappingPCH Strapping
Default (SPI):
GNT2#/
GPIO53
Default - Internal pull-up.
Low (0)
GPIO33
Default:
Disable ME in Manufacturing Mode:
SPI_MOSI
CFG[4]
Disabled - No Physical Display Port attached to
Embedded DisplayPort.
CFG[3]
Enable iTPM:
Disable iTPM:
NV_ALE
Enable Danbury:
Disable Danbury:
Pin Name
USB Table
PCIE Routing
LANE1
LANE2
LAN
MiniCard1
NC_CLE
Weak internal pull-up. Do not pull low.
Strap Description Configuration (Default value for each bit is
1 unless specified otherwise)
1:Embedded
DisplayPort
Presence
GPIO15
GPIO8
Internal weak Pull-down.
Connect to Vcc3_3 with 8.2-kΩ
- 10-kΩ weak pull-up resistor.
Reboot option at power-up
Default Mode:
No Reboot Mode with TCO Disabled:
Internal pull-up.
(Connect to ground with 4.7-kΩ weak
pull-down resistor).
INTVRMEN
High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Left both GNT0# and GNT1# floating. No pull up
required.
Boot from PCI:
Connect GNT1# to ground with 1-kΩ pull-down
resistor. Leave GNT0# Floating.
Boot from LPC:
Connect both GNT0# and GNT1# to ground with 1-kΩ
pull-down resistor.
= Configures DMI for ESI compatible operation (for servers
only. Not for mobile/desktops).
Do not pull low.
Connect to ground with 1-kΩ
pull-down resistor.
Connect to Vcc3_3 with 8.2-kΩ weak pull-up resistor.
Left floating, no pull-down required.
Connect to Vcc3_3 with 8.2-kΩ weak pull-up
resistor.
Connect to ground with 4.7-kΩ weak pull-down
resistor.
Flash Descriptor Security will be overridden.
Flash Descriptor Security will be in effect.
GPIO27
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
0:
Enabled - An external Display Port device is
connected to the Embedded Display Port.
PCI-Express Static
Lane Reversal
1:
0:
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Default
Value
PCI-Express
Configuration
Select
1:
0:
Single PCI-Express Graphics
Bifurcation enabled
Reserved -
Temporarily used
for early
Clarksfield
samples.
Clarksfield (only for early samples pre-ES1)
-
Connect to GND with 3.01K Ohm/5% resistor
Note:
Only temporary for early CFD samples
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.
1
1
1
0
USB4
10
11
Touch Panel
USB1(HS)
NC
Cardreader
Blue Tooth
USB2
Pair
4 WECAM
5
0
2
3
1
Device
MINICARD1
6
7
8
9
NC
Finger Print
NC
12
13
MINIC2
USB3
MiniCard2LANE3