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 2012-2014 Microchip Technology Inc. DS60001302A-page 1

EQCO62R20.3/EQCO31R20.3

Features:

• Complies with the CoaXPress v1.1 camera

standard

(1)

• Supports up to 68 meters of cable at 6.25 Gbps

using high-quality coax

• Supports up to 212 meters of cable at 1.25 Gbps

using high-quality coax

• Single-Chip solutions for both the camera side and

the frame grabber side, making a bidirectional

connection over a single 75Ω coax cable

• Full-Duplex, bidirectional data channel

- Downlink speeds from 1.25 Gbps up to 6.25

Gbps; differential interfacing straightforward

with internal termination resistors

- Flexible, protocol agnostic uplink supporting

up to 21 Mbps, allowing nanoseconds precise

triggering events driven by the frame grabber

• Supports power distribution over the coax up to

900 mA, powering the camera through the same

coax transporting data signals

• Low power consumption (<70 mW, 1.2V supply)

• 16-Pin, 0.65 mm pin pitch, 4 mm QFN package

• Small PCB footprint for EQCO62R20 and off-chip

components, with guaranteed RF-performance

• -40°C to +85°C industrial temperature range

• Pb-free and RoHS compliant

Applications:

• High-Definition/High-Bandwidth links to cameras

• Machine vision for semiconductor chips and

display panel inspection systems

• Military, aerospace, medical applications

• Broadcast and surveillance camera systems

• Traffic license plate and monitoring systems

• High-Speed inspection systems for food Inspection,

bottling inspection, panel inspection, etc.

• Any application requiring a single coax cable

which carries power, video data and camera

control stream.

Introduction:

The EQCO62X20

(2)

chipset is a driver/equalizer

chipset that forms a bidirectional, full-duplex

communication link over a single coax cable.

The EQCO62X20 chipset is designed to transport up to

6.25 Gbps over the downlink channel and to transport

21 Mbps over the uplink channel. The EQCO62T20 is

designed to transmit the downlink signal up to 6.25

Gbps and receive the uplink signal. The EQCO62R20

is designed to receive the downlink signal up to 6.25

Gbps and to transmit the uplink signal. Power can be

transferred over the same cable via external inductors.

The chipset is designed to work with several types of

75Ω coaxial cables, including legacy cables as well as

thin, flexible lightweight cables.

Note 1: CoaXPress V1.1 standard. Free down-

load from the JIIA website:

http://jiia.org/en/standardization/list/

2: The EQCO31T20 and EQCO31R20 are

lower-speed versions of the EQCO62T20

and EQCO62R20, with a maximum bit

rate of 3.125 Gbps for the high-speed

downlink and the same uplink speed.

EQCO62R20.3 6.25 Gbps Asymmetric Coax Equalizer/

EQCO31R20.3 3.125 Gbps Asymmetric Coax Equalizer

 2012-2014 Microchip Technology Inc. DS60001302A-page 3

EQCO62R20.3/EQCO31R20.3

Table of Contents

1.0 Device Overview .......................................................................................................................................................................... 4

2.0 Application Information................................................................................................................................................................. 9

3.0 Electrical Characteristics............................................................................................................................................................ 16

4.0 Packaging................................................................................................................................................................................... 18

TO OUR VALUED CUSTOMERS

It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip

products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and

enhanced as new volumes and updates are introduced.

If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via

E-mail at docerrors@microchip.com or fax the Reader Response Form in the back of this data sheet to (480) 792-4150. We

welcome your feedback.

Most Current Data Sheet

To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:

http://www.microchip.com

You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.

The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).

Errata

An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current

devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision

of silicon and revision of document to which it applies.

To determine if an errata sheet exists for a particular device, please check with one of the following:

• Microchip’s Worldwide Web site; http://www.microchip.com

• Your local Microchip sales office (see last page)

When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using.

Customer Notification System

EQCO62R20.3/EQCO31R20.3

DS60001302A-page 4  2012-2014 Microchip Technology Inc.

1.0 DEVICE OVERVIEW

The EQCO62X20 single-coax chipset is designed to

simultaneously transmit and receive signals on a single

75Ω coax cable. In one direction, a downlink signal is

transmitted. In the opposite direction, a lower-speed

uplink is provided. The EQCO62X20 chipset consists

of two chips. The EQCO62T20 is a high-speed line

driver with an integrated low-speed receiver. The

EQCO62R20 is a high-speed receiver with an

integrated low-speed transmitter. Figure 1-1 illustrates

a typical EQCO62X20 link setup.

The downlink signal is transmitted with 600 mV

transmit amplitude at the EQCO62T20 side. This signal

is attenuated in the coax and recovered by an equalizer

integrated in the EQCO62R20. The low-speed uplink is

transmitted with a lower amplitude of 130 mV to limit

the crosstalk with the downlink channel.

The downlink channel is intended for 8B/10B NRZ

coded data with bitrates from 1.25 Gbps up to 6.25

Gbps. The low-speed uplink has a maximum bit rate of

21 Mbps, and has a single-ended LVTLL input and

output. The uplink can operate with DC balanced, DC

unbalanced or even burst mode data.

In addition to the downlink channel and the low-speed

uplink, the system allows power transmission over the

coax by using ferrite beads and external inductors.

These external inductors give the communication

channel a high-pass characteristic. The uplink receiver

inside the EQCO62T20 chip recovers the signal lost by

this high-pass filter. Appropriate inductors need to be

selected for correct operation of the link. Correct

operation is only guaranteed with the inductor

combination used in Figure 2-1, even though other

components might be suited.

The EQCO62X20 chipset is compatible with the

CoaXPress v1.1 camera standard.

FIGURE 1-1: TYPICAL EQCO62X20 LINK SETUP

Up to 212 metres

75Ω Coax

High

Denition

Camera

EQCO

62T20

Frame

Store +

Camera

Control

Up to

6.25 Gbps

downlink

Up to

21 Mbps

uplink

Up to

900 mA DC

Up to

900 mA DC

EQCO

62R20

Up to

21 Mbps

uplink

Up to

6.25 Gbps

downlink

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