Standard
Microsystems
DO NOT COPY (c)2000 by SD Group (MEI,SanDisk,Toshiba)
4 CONFIDENTIAL
Date: February 2000
SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.0
4.12 Timings - 53
4.12.1 Command and Response - 54
4.12.2 Data Read - 55
4.12.3 Data Write - 56
4.12.4 Timing Values - 59
5 Card Registers - 60
5.1 OCR Register - 60
5.2 CID Register - 61
5.3 CSD Register - 62
5.4 RCA Register - 71
5.5 DSR Register (Optional) - 71
5.6 SCR Register - 71
6 SD Memory Card Hardware Interface - 73
6.1 Hot insertion and removal - 73
6.2 Card Detection (Insertion/Removal) - 74
6.3 Power protection (Insertion/Removal) - 74
6.4 Power up - 75
6.5 Programmable card output driver (Optional) - 77
6.6 Bus operating conditions - 79
6.7 Bus signal levels - 80
6.8 Bus timing - 81
6.9 Low Voltage (1.8v) SD Memory Cards (Preliminary) - 82
7 SPI Mode - 84
7.1 Introduction - 84
7.2 SPI Bus Protocol - 84
7.2.1 Mode Selection - 84
7.2.2 Bus Transfer Protection - 85
7.2.3 Data Read - 85
7.2.4 Data Write - 86
7.2.5 Erase & Write Protect Management - 88
7.2.6 Read CID/CSD Registers - 88
7.2.7 Reset Sequence - 88
7.2.8 Error Conditions - 88
7.2.9 Memory Array Partitioning - 89
7.2.10 Card Lock/unlock - 89
7.2.11 Application Specific commands - 89
7.2.12 Copyright Protection commands - 89
7.3 SPI Mode Transaction Packets - 89
7.3.1 Command Tokens - 89
7.3.2 Responses - 94
7.3.3 Data Tokens - 96
7.3.4 Data Error Token - 97
7.3.5 Clearing Status Bits - 97
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2009-02-26
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