ANOVO_CPCI-9650V01_090918CPCI接口原理图_cpci原理图资源-CSDN文库

CPCI

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D D

C C

B B

A A

01--COVER PAGE

02--BLOCK DIAGRAM

03--CLOCK &DEVICE TABLE

04--CLOCK GENERATOR

05--CPU (1 of 2)

06--CPU (2 of 2)

07--GMCH HOST (1 of 7)

08--GMCH DDR (2 of 7)

09--GMCH DMI & STRAP (3 of 7)

10--GMCH VGA (4 of 7)

11--GMCH POWER 1 (5 of 7)

12--GMCH POWER 2 (6 of 7)

13--GMCH GND (7 of 7)

14--SO-DIMM & TERMINATOR

15--ICH8-M HOST (1 of 4),3*SATA

16--ICH8-M PCI E(2 of 4)

17--ICH8-M GPIO (3 of 4)

18--ICH8-M Power (4 of 4)

19--GIGA LAN1

20--GIGA LAN2

21--82559 PCI LAN

22--CODAC ALC888

23--CF slot

24--SIO_W83627THF

25--TPM & COM

26--VGA swtich&PIO

27--J1 PCI32&BRIDGE

28--J2 J3 PCIE

29--J4 HDD&LVDS&AUDIO

30--J5 VGA&USB&ETC

31--ISL6262A(VCORE)

32--ISL6520A(MCH&ICH)

33--TPS51116(MEMORY)

34--CPCI HOT SWAP & MTG

35--POWER BLOCK

CPCI965 R0A

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

01--COVER PAGE

1 41Tuesday, September 08, 2009

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

01--COVER PAGE

1 41Tuesday, September 08, 2009

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

01--COVER PAGE

1 41Tuesday, September 08, 2009

D D

C C

B B

A A

Pin64

Pin8

1 CPUITP Pair

SRC Pair

Pin5 Pin9

1 x

For clock gen. and DIMM are powered

by +V3.3M, per intel

nicole, 7/27

Place these termination to close CK505.

010 200MHz

0 0 1 133 100 33

0 1 1 166 100 33

0 1 0 200 100 33

0 0 0 266 100 33

REQ3 Latched Select

"0" : CLK Control Enable

"1" : CLK Control

Disable : PCIE 2,4

REQ4 Latched Select

"0" : CLK Control Enable

"1" : CLK Control Disable : PCIE 3,5,7

400mA

* Internal pull up to VDD

**Internal pull down to GND

1 0 0 333 100 33

1 1 0 400 100 33

1 1 1 200 100 33

FSC FSB FSA CPU SRC PCI

1 0 1 100 100 33

Default

Zo=50

Change to 2.2K and 10K

nicole 7/24

25 mils

ITP/SRC7 SELECT

0: SRC7 1: ITP

PCIEX9

DOT96

Pin17/18Pin14/15

27MHz

LCD

PCIEX0

LATCH SELECT TABLE

PCIEX9

PCIEXCLK

PEREQ#

DREFCLK#

DREFCLK

VDD_PCI

48M_CLK

R_PCLK_ICH

14M_ICH

CLK_CPU_BCLK

CLK_CPU_BCLK#

CLK_MCH_BCLK#

CPU_BSEL0

VDD_48

CLK_BSEL0

CLK_MCH_BCLK

VDD_A

CLK_BSEL0

VDD_REF

CLK_BSEL2CPU_BSEL2 MCH_BSEL2

CPU_BSEL1

MCH_BSEL0

CGDAT_SMB

MCH_BSEL1

PCLK_SMB

PDAT_SMB

CLKUSB_48

PCLK_ICH

CLK_BSEL2

VDD_SRC_CPU

CG_XOUT

CLKGN_REQ4_PCIE

CLKGN_REQ3_PCIE

DREFSSCLK#

DREFSSCLK

14M_REF

CGCLK_SMB

CLKGN_REQ4_PCIE

RHCLK_MCH

CG_XIN

RHCLK_CPU#

PM_STPPCI#

R_PCLK_SLOT

RHCLK_MCH#

RHCLK_CPU

VDD_A

PM_STPCPU#

VDD_PCI

R_DREFSSCLK#

R_DREFSSCLK

CLK_BSEL1

VDD_REF

CLK_BSEL1

VDD_SRC_CPU

VDD_48

CLKGN_REQ3_PCIE

VDD_SRC_CPU

R_CLK_PCIE_LAN1#

R_CLK_PCIE_LAN1

RSRC_ICH

RSRC_ICH#

CLK_SATA#

CLK_SATA

CLK_DMI_ICH#

CLK_DMI_ICH

CLK_PCIE_LAN2#

R_CLK_PCIE_LAN2

R_CLK_PCIE_LAN2#

CLK_PCIE_LAN2

CLK_PWRGD

CGCLK_SMB

CGDAT_SMB

VREF

R_CLK_SATA

R_CLK_SATA#

R_DOT96

R_DOT96#

CLK_PCIE_LAN1

CLK_PCIE_LAN1#

CLK_PCIE_3GPLL

CLK_PCIE_3GPLL#

RSRC_MCH

RSRC_MCH#

LPC_CLK_P80

PCI_CLK_SLOTS

R_PCLK_SIO PCLK_LPC2

+3V

CLK_PCIE_LAN2 20

CLK_PCIE_LAN2# 20

DREFSSCLK 9

DREFCLK9

DREFCLK#9

DREFSSCLK# 9

14M_ICH 17

CLK_CPU_BCLK 5

CLKUSB_4817

CLK_PCIE_LAN1 19

CLK_SATA 15

CLK_SATA# 15

CLK_PCIE_LAN1# 19

CLK_CPU_BCLK# 5

MCH_BSEL0 9

CLK_DMI_ICH 16

CLK_DMI_ICH# 16

MCH_BSEL1 9

MCH_BSEL2 9

CLK_PWRGD17

CPU_BSEL05

CPU_BSEL15

CPU_BSEL25

CLK_MCH_BCLK# 7

CLK_MCH_BCLK 7

PDAT_SMB17,28

PCLK_SMB17,28

PM_STPCPU#17

PM_STPPCI#17

CLK_PCIE_3GPLL 9

CLK_PCIE_3GPLL# 9

CGCLK_SMB14,38

CGDAT_SMB14,38

PCLK_ICH 16

LPC_CLK_P80 24

CLKLPC2_4821

CLK_PCIE_LAN3 41

CLK_PCIE_LAN3# 41

PCI_CLK_SLOTS 27

PCLK_LPC2 21

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

04--CLOCK GENERATOR

4 41Wednesday, September 16, 2009

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

04--CLOCK GENERATOR

4 41Wednesday, September 16, 2009

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

04--CLOCK GENERATOR

4 41Wednesday, September 16, 2009

RP11

33_4P2R_S

RP10 33_4P2R_S

R8 340_6F

1 2

R4 2.2K

R18 10K

C19

10U

C10

10U

FB2

180ohm/2A

RP8 33_4P2R_S

R25 1K

R33 1K

R26 10K

FB1

180ohm/2A

R31 1K_NA

C16

10U

27PF

R19 33

R29 1K

R21

10K

R15 22

CK505

ICS9LPR363

VDDPCI

VDDPCIEX

Vtt_PWRGD/PD#

REF0

VDDPCIEX

CPUT_L0

CPUC_L0

GND3

VDDREF

VDDPCI

GNDA

SDATA

VDDCPU

FSLA/USB_48MHz

GND5

GND6

GND7

GND4

CPUC_L1F

CPUITPT_L2/PCIeXT_L8

CPU_STOP#

VDDPCIEX

GND2

VDDA

SCLK

CPUT_L1F

PCI/PCIeX_STOP#

CPUITPC_L2/PCIeXC_L8

PCIeXT_L1

REF1/FSLC/TEST_SEL

FSLB/TEST_MODE

27FIX/LCD_SSCGT/PCIeXT_L0

PCIeXC_L1

PCIeXT_L2

PCIeXT_L3

SATACLKT_L

PCIeXT_L4

PCIeXT_L5

PCIeXT_L6

PREQ1#PCIeXT_L7

PCIeXC_L2

PCIeXC_L3

SATACLKC_L

PCIeXC_L4

PCIeXC_L5

PCIeXC_L6

PEREQ2#PCIeXCT_L7

27SS/LCD_SSCGC/PCIeXC_L0

GND1

VDD48

*PEREQ3#

*PEREQ4#

VREF

PCIeT_L9/DOTT_96MHzL

PCIeC_L9/DOTC_96MHzL

*PWRSAVE#

*SELPCIeX0_LCD#/PCICLK3

PCICL2

PCICLK1

**PCICLK0/REQ_SEL

*SELLCD_27#/PCICLK_F5

ITPEN/PCICLK_F4

C3 27PF

C15

0.1UF/16V_4

R27 10K

RP3 33_4P2R_S

R3 33

0.1UF/16V_4

R22

10K

C17

10U

C21

10U

R1 33

RP1 33_4P2R_S

0.1UF/16V_4

R17 10K

2N7002

R28 0_NA

RP69 33_4P2R_S

C13

0.1UF/16V_4

C18

0.1UF/16V_4

R6 10K

R24 1KQ1

2N7002

R20 0_4

RP2 33_4P2R_S

R7 1K

R12 22

R11 22

C14

0.1UF/16V_4

R16 10K

R30 0_NA

RP6 33_4P2R_S

R32 0_NA

R23 1K

R34 0_4

14.318MHZ

RP7 33_4P2R_S

C20

0.1UF/16V_4

RP9 33_4P2R_S

C11

2.2UF_4

R9 22

R2 0_4

D D

C C

B B

A A

Layout Note:

Width of GTLREF

is 5mil,

Place voltage

divider

within 0.5" of

GTLREF pin.

H_PWRGD is CMOS driving by ICH

TO VRD

H_PROCHOT_R#

H_CPURST#

H_ADSTB0#

XDP_BPM#5

XDP_TCK

H_A#4

H_THERMDC

H_A#19

H_A#22

H_A#3

H_A#5

H_REQ#1

H_REQ#2

H_A#17

H_A#20

H_A#21

H_A#24

H_A#25

H_A#28

H_A#29 XDP_TRST#

H_IGNNE#

H_STPCLK#

H_INTR

H_SMI#

H_A#6

H_A#7

H_REQ#0

H_REQ#3

H_A#18

H_A#23

H_REQ#4

H_ADS#

H_A#30

H_A#27

H_A#31

H_A#26

H_A20M#

H_FERR#

H_A#32

H_A#33

H_A#34

H_A#35

H_HITM#

H_HIT#

H_A#8

XDP_TMS

XDP_BPM#5

H_LOCK#

H_A#9

H_NMI

H_A#10

H_BREQ#0

H_DBSY#

H_DRDY#

H_A#11

H_BNR#

H_ADSTB1#

H_BPRI#

XDP_TMS

H_DEFER#

H_A#12

H_THERMDA

PM_THRMTRIP#

H_A#13

H_A#14

H_RS#1

H_RS#0

H_RS#2

H_A#15

XDP_TDI

H_A#16

XDP_TDI

XDP_TCK

CLK_CPU_BCLK

CLK_CPU_BCLK#

XDP_TRST#

H_D#56

H_D#57

H_D#34

H_D#58

COMP0

H_D#2

CPU_BSEL1

CPU_BSEL0

H_D#59

H_D#3 H_D#35

H_D#32

H_D#60

H_D#36H_D#4

H_D#61

H_D#37H_D#5

COMP2

H_D#62

H_D#38H_D#6

COMP3

H_D#63

H_D#39H_D#7

H_DSTBN#3

H_D#40H_D#8

H_DSTBP#3

H_D#41

H_DINV#3

H_D#42

H_D#0

H_D#43

CPU_BSEL2

H_PWRGD

H_D#44

H_D#1

H_D#45

H_D#46

H_D#47

H_DSTBN#2

H_DINV#0

H_DSTBP#0

H_DSTBN#0

H_DSTBP#2

H_D#17

H_DINV#2

H_D#31

H_D#30

H_D#26

H_D#16

H_D#22

H_D#29

H_D#28

H_D#25

H_D#19

H_D#24

H_D#21

H_D#27

H_D#18

H_D#23

H_D#20

H_DPSLP#

H_DSTBP#1

H_DINV#1

H_DSTBN#1

H_D#48

H_D#14

H_D#49

H_D#13

H_CPUSLP#

H_D#12

PSI#

H_D#11

CPU_GTLREF

H_D#50

CPU_DPRSTP#

H_D#10

H_D#51

H_D#52

H_D#9

H_D#53

H_D#54

H_D#55

H_D#15

H_D#33

H_DPWR#

H_INIT#

H_TRDY#

COMP1

SYS_RST#XDP_DBRESET#

XDP_DBRESET#

+VCCP

H_DEFER# 7

H_LOCK# 7

H_BPRI# 7

PM_THRMTRIP# 9,15

H_THERMDA 21

H_INIT# 15

H_THERMDC 21

H_ADS# 7

H_TRDY# 7

H_CPURST# 7

CLK_CPU_BCLK 4

CLK_CPU_BCLK# 4 H_DPSLP# 15

CPU_DPRSTP# 9

CPU_BSEL14

CPU_BSEL04

H_CPUSLP# 7

CPU_BSEL24

H_DPWR# 7

H_BNR# 7

H_DBSY# 7

H_DRDY# 7

H_HIT# 7

H_HITM# 7

H_BREQ#0 7

H_DINV#[3:0] 7

H_DSTBN#[3:0] 7

H_DSTBP#[3:0] 7

H_RS#[2:0] 7

PSI# 31

H_ADSTB1#7

H_ADSTB0#7

H_REQ#[4:0] 7

H_A#[35:3] 7

H_FERR#15

H_PWRGD 15

H_INTR15

H_NMI15

H_A20M#15

H_IGNNE#15

H_SMI#15

H_STPCLK#15

H_D#[63:0] 7

SYS_RST# 17,25,26

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

05--CPU (1 of 2)

5 41Saturday, September 12, 2009

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

05--CPU (1 of 2)

5 41Saturday, September 12, 2009

Title

Size

Document Number R e v

Date: Sheet o f

CPCI 965 0.1

05--CPU (1 of 2)

5 41Saturday, September 12, 2009

ADDR GROUP 0

ADDR GROUP 1

CONTROL

XDP/ITP SIGNALS

H CLK

THERMAL

RESERVED

ICH

U2A

Merom Ball-out Rev 1a

A[10]#

A[11]#

A[12]#

A[13]#

A[14]#

A[15]#

A[16]#

A[17]#

A[18]#

A[19]#

A[20]#

A[21]#

A[22]#

A[23]#

A[24]#

A[25]#

A[26]#

A[27]#

A[28]#

A[29]#

A[3]#

A[30]#

A[31]#

RSVD[01]

RSVD[02]

RSVD[03]

RSVD[04]

RSVD[05]

RSVD[06]

RSVD[07]

RSVD[08]

D22

A[4]#

A[5]#

A[6]#

A[7]#

A[8]#

A[9]#

A20M#

ADS#

ADSTB[0]#

ADSTB[1]#

RSVD[09]

BCLK[0]

A22

BCLK[1]

A21

BNR#

BPM[0]#

AD4

BPM[1]#

AD3

BPM[2]#

AD1

BPM[3]#

AC4

BPRI#

BR0#

DBR#

C20

DBSY#

DEFER#

DRDY#

F21

FERR#

HIT#

HITM#

IERR#

D20

IGNNE#

INIT#

LINT0

LINT1

LOCK#

PRDY#

AC2

PREQ#

AC1

PROCHOT#

D21

REQ[0]#

REQ[1]#

REQ[2]#

REQ[3]#

REQ[4]#

RESET#

RS[0]#

RS[1]#

RS[2]#

SMI#

STPCLK#

TCK

AC5

TDI

AA6

TDO

AB3

THERMTRIP#

THERMDA

A24

THERMDC

B25

TMS

AB5

TRDY#

TRST#

AB6

A[32]#

A[33]#

AA4

A[34]#

AB2

A[35]#

AA3

RSVD[10]

R43 0_4

R36 54.9_6F

R42 68

DATA GRP 0

DATA GRP 1

DATA GRP 2DATA GRP 3

MISC

U2B

Merom Ball-out Rev 1a

COMP[0]

R26

COMP[1]

U26

COMP[2]

AA1

COMP[3]

D[0]#

E22

D[1]#

F24

D[10]#

J24

D[11]#

J23

D[12]#

H22

D[13]#

F26

D[14]#

K22

D[15]#

H23

D[16]#

N22

D[17]#

K25

D[18]#

P26

D[19]#

R23

D[2]#

E26

D[20]#

L23

D[21]#

M24

D[22]#

L22

D[23]#

M23

D[24]#

P25

D[25]#

P23

D[26]#

P22

D[27]#

T24

D[28]#

R24

D[29]#

L25

D[3]#

G22

D[30]#

T25

D[31]#

N25

D[32]#

Y22

D[33]#

AB24

D[34]#

V24

D[35]#

V26

D[36]#

V23

D[37]#

T22

D[38]#

U25

D[39]#

U23

D[4]#

F23

D[40]#

Y25

D[41]#

W22

D[42]#

Y23

D[43]#

W24

D[44]#

W25

D[45]#

AA23

D[46]#

AA24

D[47]#

AB25

D[48]#

AE24

D[49]#

AD24

D[5]#

G25

D[50]#

AA21

D[51]#

AB22

D[52]#

AB21

D[53]#

AC26

D[54]#

AD20

D[55]#

AE22

D[56]#

AF23

D[57]#

AC25

D[58]#

AE21

D[59]#

AD21

D[6]#

E25

D[60]#

AC22

D[61]#

AD23

D[62]#

AF22

D[63]#

AC23

D[7]#

E23

D[8]#

K24

D[9]#

G24

TEST5

AF1

DINV[0]#

H25

DINV[1]#

N24

DINV[2]#

U22

DINV[3]#

AC20

DPRSTP#

DPSLP#

DPWR#

D24

DSTBN[0]#

J26

DSTBN[1]#

L26

DSTBN[2]#

Y26

DSTBN[3]#

AE25

DSTBP[0]#

H26

DSTBP[1]#

M26

DSTBP[2]#

AA26

DSTBP[3]#

AF24

GTLREF

AD26

PSI#

AE6

PWRGOOD

SLP#

TEST3

C24

BSEL[0]

B22

BSEL[1]

B23

BSEL[2]

C21

TEST2

D25

TEST4

AF26

TEST6

A26

TEST1

C23

R41

R35 56

R39 54.9_6F

R51

2K_4F

R48 27.4_6F

R44 27.4_6F

R3780_4

R49 0_4

R37 54.9_6F

R38 54.9_6F

R46 54.9_6F

R40 680

1 2

R50 54.9_6F

剩余40页未读，继续阅读

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