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### MCIMX31 Datasheet - ARM11 内核多媒体处理器 #### 一、简介 MCIMX31 和 MCIMX31L 是由 Freescale Semiconductor（飞思卡尔半导体）推出的多媒体应用处理器，代表了低功耗、高性能应用处理器领域的最新进展。这些处理器基于 ARM11 微处理器核心，旨在满足现代数字设备对高性能和低功耗的需求。该系列处理器适用于多种应用场景，包括功能丰富的手机、便携式媒体播放器、移动游戏机、个人数字助理 (PDA) 和无线 PDA、便携式 DVD 播放器以及数码相机等。 #### 二、特点 - **ARM1136JF-S 核心**：MCIMX31 和 MCIMX31L 采用 ARM1136JF-S 微处理器核心，典型运行速度为 532MHz。 - **低功耗设计**：采用最先进的节能技术（如 DPTC、DVFS、电源门控和时钟门控）实现最小化的功耗消耗。 - **90nm 工艺技术与双阈值电压晶体管**：利用 90nm 制程技术和双阈值电压晶体管 (Dual-Vt transistors)，进一步降低了功耗并提高了性能。 #### 三、模块概述 MCIMX31 和 MCIMX31L 包含多个模块以支持各种功能需求，主要包括： - **ARM11 微处理器核心**：提供高性能计算能力。 - **多媒体加速器**：用于视频解码和编码、图像处理等功能。 - **内存接口**：支持多种类型内存的接入，如 DDR SDRAM、NAND Flash 等。 - **通信接口**：包括 USB、SD/MMC、I2C、SPI 等多种标准接口，用于外部设备连接。 - **音频和视频接口**：支持 HDMI、LVDS、MIPI 等显示接口以及音频编解码器接口。 - **安全功能**：包含加密引擎、安全启动等功能，保护设备免受恶意攻击。 #### 四、电气特性 - **供电要求**：文档详细列出了芯片级别的供电条件，包括电源电压范围、电流限制等关键参数。 - **电源上电顺序**：定义了正确的电源上电顺序，确保芯片稳定运行。 - **模块级电气规格**：提供了各个模块的工作电压、工作频率等电气参数，有助于设计人员进行系统设计时考虑兼容性和稳定性。 #### 五、封装信息 MCIMX31 和 MCIMX31L 提供 MAPBGA 封装，具体规格如下： - **封装型号**：MAPBGA–457 - **尺寸**：14x14mm - **间距**：0.5P - **温度范围**：0°C 至 +70°C #### 六、输入输出信号设置文档中还详细介绍了 MCIMX31 和 MCIMX31L 的 I/O 垫信号设置，包括信号名称、功能描述及配置参数等，为设计人员提供了完整的接口定义信息。 #### 七、产品文档修订历史文档最后部分提供了产品文档的修订历史，记录了每次版本更新的时间、内容变化等信息，有助于了解文档的完善过程和发展轨迹。 #### 结论 MCIMX31 和 MCIMX31L 作为基于 ARM11 核心的多媒体应用处理器，凭借其高性能、低功耗的特点，在消费电子领域具有广泛的应用前景。通过详细的模块设计和技术参数说明，设计人员可以充分利用这些处理器的优势，开发出满足市场需求的高性能数字设备。

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Preliminary

Freescale Semiconductor

Advance Information

This document contains information on a new product. Specifications and information herein are subject to change without notice.

Document Number: MCIMX31

Rev. 1.4, 04/2006

MCIMX31 and

MCIMX31L

Package Information

Plastic Package

Case 1581-01 14 x 14 mm, 0.5 P

Ordering Information

Device

Operating

Temperature Range

Package

MCIMX31VKN5 0°C to +70°C MAPBGA–457

MCIMX31LVKN5 0°C to +70°C MAPBGA–457

1 Introduction

The i.MX31 (MCIMX31) and i.MX31L (MCIMX31L)

are multimedia applications processors that represent the

next step in low-power, high-performance application

processors. Unless otherwise specified, the material in

this data sheet is applicable to both the i.MX31 and

i.MX31L processors.

Based on an ARM11

™

microprocessor core, the

i.MX31 and i.MX31L provide the performance with

low power consumption required by modern digital

devices such as:

• Feature-rich cellular phones

• Portable media players and mobile gaming

machines

• Personal digital assistants (PDAs) and Wireless

PDAs

• Portable DVD players

• Digital cameras

The i.MX31 and i.MX31L take advantage of the

ARM1136JF-S

™

core running at typical speeds of

532 MHz, and is optimized for minimal power

i.MX31 and i.MX31L

Multimedia Applications

Processors

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1.2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . 2

2 Functional Description and Application

Information . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2.1 ARM11 Microprocessor Core . . . . . . . . . . . 3

2.2 Module Inventory . . . . . . . . . . . . . . . . . . . . 5

2.3 Module Descriptions . . . . . . . . . . . . . . . . . . 8

3 Signal Descriptions . . . . . . . . . . . . . . . . . . . 23

3.1 i.MX31 and i.MX31L I/O Pad Signal

Settings . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4 Electrical Characteristics . . . . . . . . . . . . . . 60

4.1 i.MX31 and i.MX31L

Chip-Level Conditions . . . . . . . . . . . . . . . 60

4.2 Supply Power-Up Requirements and

Restrictions . . . . . . . . . . . . . . . . . . . . . . . 65

4.3 Module-Level Electrical Specifications . . . 66

5 Package Information and Pinout . . . . . . . 152

5.1 MAPBGA Production Package

457 14 x 14 mm, 0.5 P . . . . . . . . . . . . . . 153

6 Product Documentation . . . . . . . . . . . . . . . 167

6.1 Revision History . . . . . . . . . . . . . . . . . . . 167

i.MX31/i.MX31L Advance Information, Rev. 1.4

2 Freescale Semiconductor

Preliminary

Introduction

consumption using the most advanced techniques for power saving (DPTC, DVFS, power gating, clock

gating). With 90 nm technology and dual-Vt transistors (two threshold voltages), the i.MX31 and

i.MX31L provide the optimal performance versus leakage current balance.

The performance of the i.MX31 and i.MX31L is boosted by a multi-level cache system, and features

peripheral devices such as an MPEG-4 Hardware Encoder (VGA, 30 fps), an Autonomous Image

Processing Unit, a Vector Floating Point (VFP11) co-processor, and a RISC-based SDMA controller.

The i.MX31 and i.MX31L support connections to various types of external memories, such as 266 MHz

DDR, NAND Flash, NOR Flash, SDRAM, and SRAM. The i.MX31 and i.MX31L can be connected to a

variety of external devices using technology, such as high-speed USB2.0 OTG, ATA, MMC/SDIO, and

compact flash.

1.1 Features

The i.MX31 and i.MX31L are designed for the high-tier and mid-tier smartphone markets. They provide

low-power solutions for high-performance demanding multimedia and graphics applications.

The i.MX31 and i.MX31L are built around the ARM11 MCU core and implemented in the 90 nm

technology.

The systems include the following features:

• Multimedia and floating-point hardware acceleration supporting:

— MPEG-4 real-time encode of up to VGA at 30 fps

— MPEG-4 real-time video post-processing of up to VGA at 30 fps

— Video conference call of up to QCIF-30 fps (decoder in software), 128 kbps

— Video streaming (playback) of up to VGA-30 fps, 384 kbps

— 3D graphics and other applications acceleration with the ARM

tightly-coupled Vector

Floating Point co-processor

— On-the-fly video processing that reduces system memory load (for example, the

power-efficient viewfinder application with no involvement of either the memory system or the

ARM CPU)

• Advanced power management

— Dynamic voltage and frequency scaling

— Multiple clock and power domains

— Independent gating of power domains

• Multiple communication and expansion ports including a fast parallel interface to an external

graphic accelerator (supporting major graphic accelerator vendors)

1.2 Block Diagram

Figure 1 shows the i.MX31 and i.MX31L simplified interface block diagram.

Functional Description and Application Information

i.MX31/i.MX31L Advance Information, Rev. 1.4

Freescale Semiconductor 5

Preliminary

2.2 Module Inventory

Table 3 shows an alphabetical listing of the modules in the multimedia applications processor. A

cross-reference is provided directly to each module description for more information.

Table 2. i.MX31/i.MX31L Core

Core

Acronym

Core

Name

Brief Description

Integrated Memory

Includes

ARM11 or

ARM1136

Platform

The ARM1136™ Platform consists of the ARM1136JF-S core, the ETM

real-time debug modules, a 6 x 5 multi-layer AHB crossbar switch (MAX), and a

Vector Floating Processor (VFP).

The i.MX31/i.MX31L provide a high-performance ARM11 microprocessor core

and highly integrated system functions. The ARM Application Processor (AP)

and other subsystems address the needs of the personal, wireless, and portable

product market with integrated peripherals, advanced processor core, and

power management capabilities.

•16 Kbyte

Instruction Cache

• 16 Kbyte Data

Cache

• 128 Kbyte L2

Cache

• 32 Kbyte ROM

• 16 Kbyte RAM

Table 3. Digital and Analog Modules

Block

Mnemonic

Block Name

Functional

Grouping

Brief Description3

Section/

Page

1-Wire® 1-Wire Interface Connectivity

Peripheral

The 1-Wire module provides bi-directional communication between

the ARM11 core and the Add-Only-Memory EPROM (DS2502).

The 1-Kbit EPROM is used to hold information about battery and

communicates with the ARM11 platform using the IP interface.

2.3.1/8

ATA Advanced

Technology (AT)

Attachment

Connectivity

Peripheral

The ATA block is an AT attachment host interface. It is designed to

interface with IDE hard disc drives and ATAPI optical disc drives.

2.3.2/8

AUDMUX Digital Audio

Multiplexer

Multimedia

Peripheral

The AUDMUX interconnections allow multiple, simultaneous

audio/voice/data flows between the ports in point-to-point or

point-to-multipoint configurations.

2.3.3/9

CCM Clock Control

Module

Clock The CCM provides clock, reset, and power management control for

the i.MX31 and i.MX31L.

2.3.4/9

CSPI Configurable

Serial Peripheral

Interface (x 3)

Connectivity

Peripheral

The CSPI is equipped with data FIFOs and is a master/slave

configurable serial peripheral interface module, capable of

interfacing to both SPI master and slave devices.

2.3.5/10

ECT Embedded

Cross Trigger

Debug The ECT is composed of three CTIs (Cross Trigger Interface) and

one CTM (Cross Trigger Matrix—key in the multi-core and multi-IP

debug strategy.

2.3.6/10

EMI External

Memory

Interface

Memory

Interface (EMI)

The EMI includes

• Multi-Master Memory Interface (M3IF)

• Enhanced SDRAM/MDDR memory controller (SDRAMC)

• NAND Flash Controller (NFC)

• Wireless External Interface Module (WEIM)

2.3.7/11

EPIT Enhanced

Periodic

Interrupt Timer

Timer

Peripheral

The EPIT is a 32-bit “set and forget” timer which starts counting

after the EPIT is enabled by software. It is capable of providing

precise interrupts at regular intervals with minimal processor

intervention.

2.3.8/12

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