© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 5
Philips Semiconductors
UM10161
Volume 1 Chapter 1: Introductory information
The connection of on-chip peripherals to device pins is controlled by a Pin Connect Block
(see Section 7.4 on page 66
). This must be configured by software to fit specific
application requirements for the use of peripheral functions and pins.
1.6 ARM7TDMI-S processor
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and related
decode mechanism are much simpler than those of microprogrammed Complex
Instruction Set Computers. This simplicity results in a high instruction throughput and
impressive real-time interrupt response from a small and cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
THUMB, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind THUMB is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
• The standard 32-bit ARM instruction set.
• A 16-bit THUMB instruction set.
The THUMB set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because THUMB code
operates on the same 32-bit register set as ARM code.
THUMB code is able to provide up to 65% of the code size of ARM, and 160% of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
The ARM7TDMI-S processor is described in detail in the ARM7TDMI-S data sheet that
can be found on official ARM website.
1.7 On-chip flash memory system
The LPC2101/02/03 incorporate a 8 kB, 16 kB, and 32 kB flash memory system
respectively. This memory may be used for both code and data storage. Programming of
the flash memory may be accomplished in several ways:
• using the serial built-in JTAG interface
• using In System Programming (ISP) and UART
• using In Application Programming (IAP) capabilities
The application program, using the IAP functions, may also erase and/or program the
flash while the application is running, allowing a great degree of flexibility for data storage
field firmware upgrades, etc. The entire flash memory is available for user code because
the boot loader resides in a separate memory location.
