EfficientFPGA-basedImplementationsoftheMIMO-OFDMPhysicalLayer资源-CSDN文库

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高效FPGA基於MIMO-OFDM物理層的實現，是當前無線通信領域的一個重要研究方向。本文將從給定的標題、描述、標籤以及部分內容中，詳細解析相關的IT知識點，特別是關於FPGA（Field Programmable Gate Array）、MIMO-OFDM（Multiple Input Multiple Output - Orthogonal Frequency Division Multiplexing）以及物理層實現的技術細節。 ### 1. FPGA在MIMO-OFDM物理層中的應用 FPGA是一種可編程邏輯器件，能夠實現硬件級別的靈活性和性能優化，特別適合用於通信系統的物理層實現，尤其是對於高數據速率和靈活性要求高的MIMO-OFDM技術。相比單一的DSP芯片，FPGA能夠支持更高的數據速率，同時通過動態重配置特性，實現對不同通信模式和標準的適應性。 ### 2. MIMO-OFDM技術概覽 MIMO-OFDM結合了多輸入多輸出（MIMO）和正交頻分復用（OFDM）兩項關鍵技術，能夠顯著提升無線網絡的傳輸速率和可靠性。在802.11n WLAN等新一代無線標準中，MIMO-OFDM能夠實現高達250Mbps的數據速率，遠超傳統單天線系統的性能。其核心優勢在於利用多天線的空間分集增益和頻率選擇性衰落下的頻譜效率提升。 ### 3. FPGA基於MIMO-OFDM的物理層設計論文提出了一種基於FPGA的MIMO-OFDM物理層原型設計，其中關鍵創新點為採用流水線架構，共享快速傅里葉變換（FFT）模塊進行系統調制，從而大幅節省了硬件資源。實驗結果表明，這種設計方法相比已知基線實施方案，至少節省了30%的硬件資源，同時保持了相同的數據速率。更進一步的分析顯示，通過這種設計，數據速率可以翻倍，而硬體資源的減少比例大致相同。 ### 4. 動態重配置在MIMO-OFDM系統中的角色動態重配置是FPGA的重要特性之一，它允許在運行時修改硬件配置，以適應不同的通信模式或標準。對於MIMO-OFDM系統而言，這意味著可以在不中斷服務的情況下，實時調整系統參數，以優化性能或適應環境變化。這種能力對於提高無線通信的可靠性和靈活性至關重要。總結來說，高效FPGA基於MIMO-OFDM物理層的實現，通過採用創新性的硬件架構和充分利用FPGA的動態重配置特性，不僅顯著提升了系統的性能和資源效率，還大大增強了系統的適應能力和可靠性，為下一代無線通信技術的發展開闢了新的道路。

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Eﬃcient FPGA-based Implementations of

the MIMO-OFDM Physical Layer

Jeoong S. Park, Hong-Jip Jung and Viktor K. Prasanna

University of Southern California, Los Angeles, CA, USA

{jeoongpa, hongjung, prasanna}@usc.edu

Abstract - In this pa per, we present a prototype FPGA

des ign for an eﬃcient physi cal layer implementation of a

MIMO-OFDM technique. We propose a p ipelined architec-

ture using a Fast Fourier Transform that is shared across

modulations for the system. Our experimenta l results show

tha t the propo sed implementation saves at least 30 percent

of the hardware resources, while achieving the same data

rate as known baseline MIMO-OFDM implementations. In

our performance analysis , we show that this da ta rate can

be doubled, with approximately the same resource reduction.

We also identify the role of dynamic reconﬁgurat ion in

MIMO-OFDM systems.

Keywords: MIMO, OFDM, FPGA

1 Introduction

High data rate wirel ess communication has improved by

a f actor of mi nimum four while migrating from one gener-

ation to next generation [26]. The technology is based on

Orthogonal Frequency Division Multiplexing (OFDM). The

upcoming standard 802.11n WLAN, however, can achieve

250 Mbits/s by virtue of Multiple Input Multiple Output

OFDM (MIMO-OFDM) technology. This ongoing evo-

lution has accelerated the development of system-on-chip

(SoC) platforms to support the physical layer of those tech-

nologies [3].

The SoC platforms must satisfy two requirements in order

to support this wireless technology [14]. First, the platform

must be able to sati sfy the tremendous data rate. A single

DSP chip cannot currently support 54 Mbits/s [16] . The

second requirement is ﬂexibility. Wireless communication

is obviously less reliable than wired communication. For

example, the IEEE standard 802.11a [1] has various com-

munication modes with possible data rates of 6, 9, 12, 18,

24, 36, 48, and 54 Mbits/s. For the SoC to adapt to dif-

ferent operating conditions and standards, there need to be

not only the real time conversion of mode in a wireless com-

munication protocol, but also a conversion between diﬀerent

protocols.

To implement the OFDM or MIMO-OFDM physical layer

on an SoC, many eﬀorts have b een carried out by DSP,

VLSI, FPGA, and communication groups. In [23], an op-

timized DSP implementation of an OFDM transmitter was

developed. Application speciﬁc integrated circuit (ASIC)

chips and test-beds for MIMO-OFDM were proposed in [24].

In [6], a prototype ﬁeld programmable gate array (FPGA)

implement ation of an OFDM physical layer is shown using

the Xilinx System Generator. Manavi et al. [13] provide

the design and implementation of an OFDM transceiver mo-

dem using the Xilinx Core Generator. Both studies use

FPGA intellectual property components (IP C ores), and

libraries to build most of the kernels. An OFDM wire-

less transceiver for 802.16 WiMAX (Broadband Wireless

Access Technology), using Lattice FPGA and IP Cores

is described in [12]. A test-bed for MIMO-OFDM using

FPGA transceivers and t heir customized hardware boards

is developed in [21]. This test-bed is built using Virtex-II

transceiver boards. The b eneﬁt of reconﬁgurable architec-

ture for wireless communication is discussed, and its po-

tential is explored through prototyping [14]. I n [5], partial

reconﬁguration for Software Deﬁned Radios (SDR) using

the SelectMAP i nterface of the Xilinx Virtex FPGA is pro-

posed.

In this paper we propose a new pipelined architecture

for MIMO-OFDM systems. Our architecture improves re-

source utilization, compared with the architectures of [24]

and [21]. We also identify the role of dynamic reconﬁgura-

tion in MIMO-OFDM systems ( [14], [5] ).

FPGAs supporting reconﬁgurability with very high per-

formance have recently entered the market [14]. Utilizing

these features can satisfy two requirements of t he wireless

communication physical layer simultaneously. The ﬂexibil-

ity allows the device to change data rate, and increase di-

versity and range as needed. The dynamic (runtime) recon-

ﬁguration approaches oﬀer the opportunity to replace oper-

ating modules at runtime. Thus, dynamic reconﬁguration

can result in eﬃcient resource utilization while providing

ﬂexibility.

In this paper, an eﬃcient FPGA design of a MIMO-

OFDM physical layer is presented. We start w ith the design

of an OFDM physical layer that follows the IEEE standard

802.11a. We then devise an eﬃcient pipelined architecture,

and incorporate it into the MIMO-OFDM physical layer.

In our experiments, we compare our pipelined archit ecture

to the baseline MIMO-OFDM physical layer implementa-

tion. The baseline MIMO-OFDM system uses the same

number of fast Fourier transform (FFT) blocks as antennas.

The implementation eﬃciency of our pipelined architecture,

compared wit h the baseline MIMO- OFDM system, is evalu-

ated using two methods: (1) using just one FFT block, and

(2) using Radix-2 pipelined streaming FFT block, versus

a Radix-4 FFT block used in the baseline MIMO-OFDM

system. Our experiments show that at least 30 percent

of the resources in the baseline MIMO-OFDM system can

be saved using our proposed architecture, while achieving

the same data rate. We also show that this data rate can

be doubled, with approximately the same resource reduc-

tion. Moreover, by exploiting the dynamic reconﬁguration,

our MIMO-OFDM system can adapt to various operating

modes. We also present experimental results and analysis

regarding dynamic reconﬁguration.

This paper is organized as follows. Section 2 presents

a brief overview of MIMO- OFDM systems. Section 3 de-

scribes our proposed architecture and performance analysis.

Section 4 discusses opportunities for using dynamic recon-

ﬁguration. In Section 5, we provide experimental results,

and we conclude in Section 6.

2 Background

In this section, we present a brief overview of MIMO-

OFDM systems.

2.1 Orthogonal Frequency Division

Multipl exing

Frequency Division Multiplexing (FDM) transmits multi-

ple signals simultaneously over a single path. Each signal

has a unique frequency range (carrier). Orthogonal FDM

(OFDM) [10] is a special case of FDM where a single data

stream is distributed over several lower rate sub-carriers.

In other words, one signal is transmitted by multiple carri-

ers. Sub-carriers are separated by given frequency ranges,

to avoid cross-carrier interference. The beneﬁt of orthogo-

nality is that it gives a high spectral density (maximizing

channel usage). A guard band interval is employed to avoid

the Inter-Symbol Interference (ISI) problem [10].

2.2 Multipl e Input Multiple Output

A third dimension, space, is introduced into the traditional

frequency-time domain. The idea is to transmit multiple

streams of data on multiple antennas at the same frequency,

to increase throughput. Typically, multiple receiver anten-

nas are used as well, since this conﬁguration achieves high

data rates, multiplied by the number of channels between

either end. This principle is called Multiple Input Multi ple

Output (MIMO) [22].

There are two metho ds widely used for transmitting

MIMO data. If the channel has a negligi ble error rate, we

can send several dat a simultaneously over multiple anten-

nas. This is known as spatial multiplexing, which utilizes

the spectrum very eﬃciently. In contrast, if the environment

has high error rate, we transmit the same data over multiple

antennas. This is called as space-time coding. The purpose

of this approach is to increase the diversity of MIMO to

combat signal fading.

Tx1

Tx2

Tx3

Rx1

Rx2

Rx3

Channel

Figure 1: The MIMO principle

The essential purpose of a MIMO system is to determine

which antenna is corresponding to which data on the re-

ceiver si de. As shown in Figure 1, Rx1 receives data from

all the transmitter ant ennas, Tx1, Tx2, and Tx3. Thus, we

must have a special decoding algorithm to identify which

antenna has transmitted which data to Rx1.

2.3 Overview of MIMO-OFDM Kernels

A kernel of MIMO-OFDM indicates each component shown

in Figure 2 and 3. These ﬁgures show the transmitter and

receiver data ﬂows, respectivel y. The computational com-

plexity of each kernel i s given in the Appendix. The 802.11n

and the 802.16e standards for MIMO-OFDM have not yet

been established: the input and output data rates shown in

these ﬁgures are based on our assumptions. We assume that

the data rate of MIMO-OFDM is N times that of OFDM, if

we use N antennas in both the transmitter and the receiver.

In the case of the OFDM standard, 20 Mega symbols per

second are required. The function of a receiver kernel is the

reverse of the corresponding transmitter kernel with the ex-

ception of a f ew blocks. In the following, we brieﬂy describe

the kernels of the transmitter and receiver.

2.3.1 Kernels in the Transmitter

Convoluti ona l coding: The convolutional coding is indis-

pensable in wireless communication system. It is used for

error correction, by adding redundant bits to the original

data.

Puncturing: Puncturing removes some of the bits to

reduce the redundancy in the data after convolutional

coding. Thus, we can achieve higher data rate. There are

three puncturing rates: 1/2, 2/3, and 3/4.

Interleaving: Interleaving combats si gnal fading. The

block size corresponds to the number of bits in a single

OFDM symbol.

QAM Mappin g: After the bits are int erleaved, they

are placed into groups of 1, 2, 4, or 6. Each of these

groups is mapped to a corresponding complex number,

which represents the orthogonal frequency of the OFDM

sub-carrier according to the modulation type - binary

phase shift keying (BPSK), quaternary PSK (QPSK),

16-quadrature amplitude modulation (QAM), or 64-QAM.

The modulation scheme is determined according to signal-

to-noise ratio (SNR) at the receiver. For example, if the

current modulation is 16-QAM and t he SNR is decreasing,

the modulation is changed to QPSK to lower the error rate.

Frequency Domain Setting: Before t he complex num-

bers are processed by the 64-pt IFFT operation, this kernel

inserts 4 additional symbols called a pil ot. These pilots are

used for control, synchronization, and supervision. A fter

the addition of pilots, the total 52 complex numbers are

increased to 64 complex inputs to the IFFT kernel.

Parsing: The parsing kernel makes multiple indepen-

dent channels from one data stream. Spatial multiplexing

[8], space time coding (STC) [4], and eigen beam-forming

[7] are the most common parsing algorithms.

IFFT : T his kernel performs an inverse fast Fourier

tran sform on 64 arranged signals (48 data signals, 4 pilot

signals, and 12 non-signals), in frequency domain. Our

main contribution is to optimize this block with a novel

pipelined architecture.

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