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i.MX 8M Plus Applications Processor

Reference Manual

Document Number: IMX8MPRM

Rev. D, 12/2020

Preliminary

Confidential Proprietary

Contents

Section number Title Page

Chapter 1

Introduction

1.1 Product Overview ........................................................................................................................................................ 9

1.2 Target Applications.......................................................................................................................................................9

1.3 Acronyms and Abbreviations....................................................................................................................................... 10

1.4 Features.........................................................................................................................................................................12

1.5 Architectural Overview.................................................................................................................................................19

1.6 Primary Boot Options................................................................................................................................................... 20

1.7 Endianness Support.......................................................................................................................................................21

Chapter 2

Memory Map

2.1 Memory.........................................................................................................................................................................23

Chapter 3

Security

3.1 System Security............................................................................................................................................................ 41

3.2 Resource Domain Controller (RDC)............................................................................................................................ 43

Chapter 4

ARM Platform and Debug

4.1 ARM Cortex A53 Platform (A53)................................................................................................................................ 89

4.2 ARM Cortex M7 Platform (M7)...................................................................................................................................95

4.3 Messaging Unit (MU)...................................................................................................................................................97

4.4 Semaphore (SEMA4)....................................................................................................................................................136

4.5 On-Chip RAM Memory Controller (OCRAM)............................................................................................................154

4.6 Network Interconnect Bus System (NIC).....................................................................................................................157

4.7 AHB to IP Bridge (AIPSTZ)........................................................................................................................................ 158

4.8 Shared Peripheral Bus Arbiter (SPBA).........................................................................................................................180

4.9 TrustZone Address Space Controller (TZASC)........................................................................................................... 193

4.10 System Debug...............................................................................................................................................................194

i.MX 8M Plus Applications Processor Reference Manual, Rev. D, 12/2020

NXP Semiconductors

Preliminary

Confidential Proprietary

Section number Title Page

4.11 System JTAG Controller (SJC).................................................................................................................................... 199

4.12 System Counter (SYS_CTR)........................................................................................................................................230

Chapter 5

Clocks and Power Management

5.1 Clock Control Module (CCM)......................................................................................................................................269

5.2 General Power Controller (GPC)..................................................................................................................................601

5.3 Crystal Oscillator (XTALOSC).................................................................................................................................... 753

5.4 Thermal Monitoring Unit (TMU)................................................................................................................................. 757

Chapter 6

SNVS, Reset, Fuse, and Boot

6.1 System Boot..................................................................................................................................................................769

6.2 Fusemap........................................................................................................................................................................836

6.3 On-Chip OTP Controller (OCOTP_CTRL)..................................................................................................................846

6.4 Secure Non-Volatile Storage (SNVS).......................................................................................................................... 898

6.5 System Reset Controller (SRC).................................................................................................................................... 932

6.6 Watchdog Timer (WDOG)........................................................................................................................................... 1003

Chapter 7

Interrupts and DMA

7.1 Interrupts and DMA Events..........................................................................................................................................1021

7.2 Smart Direct Memory Access Controller (SDMA)...................................................................................................... 1041

7.3 Enhanced Direct Memory Access (eDMA)..................................................................................................................1289

7.4 Interrupt Request Steering (IRQ_STEER)....................................................................................................................1351

Chapter 8

Chip IO and Pinmux

8.1 External Signals and Pin Multiplexing......................................................................................................................... 1361

8.2 IOMUX Controller (IOMUXC)....................................................................................................................................1384

8.3 General Purpose Input/Output (GPIO)......................................................................................................................... 2015

Chapter 9

External Memory

9.1 External Memory Overview......................................................................................................................................... 2035

i.MX 8M Plus Applications Processor Reference Manual, Rev. D, 12/2020

Preliminary

NXP Semiconductors

Confidential Proprietary

Section number Title Page

9.2 DDR Controller (DDRC)..............................................................................................................................................2037

9.3 DDR BLK_CTRL.........................................................................................................................................................2238

9.4 DDR PHY (DDR_PHY)...............................................................................................................................................2240

9.5 AHB-to-APBH Bridge with DMA (APBH-Bridge-DMA).......................................................................................... 2554

9.6 62BIT Correcting ECC Accelerator (BCH)..................................................................................................................2592

9.7 General Purpose Media Interface (GPMI)....................................................................................................................2649

Chapter 10

Mass Storage

10.1 Enhanced Configurable SPI (ECSPI)........................................................................................................................... 2701

10.2 FlexSPI Controller (FlexSPI)........................................................................................................................................2730

10.3 Ultra Secured Digital Host Controller (uSDHC)..........................................................................................................2854

Chapter 11

Connectivity

11.1 HSIO BLK_CTRL........................................................................................................................................................3013

11.2 Universal Serial Bus Controller (USB).........................................................................................................................3032

11.3 Universal Serial Bus PHY (USB_PHY).......................................................................................................................3271

11.4 PCI Express (PCIe).......................................................................................................................................................3275

11.5 PCI Express PHY (PCIe_PHY)....................................................................................................................................3646

11.6 Ethernet MAC (ENET).................................................................................................................................................4031

11.7 Ethernet Quality Of Service (ENET_QOS) .................................................................................................................4180

11.8 FlexCAN.......................................................................................................................................................................5219

Chapter 12

Timers

12.1 General Purpose Timer (GPT)......................................................................................................................................5357

12.2 Pulse Width Modulation (PWM)..................................................................................................................................5379

Chapter 13

Display, Imaging, and Camera

13.1 Display, Imaging, and Camera Overview.....................................................................................................................5393

13.2 MEDIA BLK_CTRL.................................................................................................................................................... 5401

13.3 Enhanced LCD Interface (eLCDIF)..............................................................................................................................5470

i.MX 8M Plus Applications Processor Reference Manual, Rev. D, 12/2020

NXP Semiconductors

Preliminary

Confidential Proprietary