XAPP460 (v1.1) June 24, 2011 www.xilinx.com 1
© Copyright 2008–2011 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included herein are
trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.
Summary Transition Minimized Differential Signaling (TMDS) is a standard used for transmitting video
data over the Digital Visual Interface (DVI) and High-Definition Multimedia Interface (HDMI).
Both interfaces are commonly used by consumer electronics including flat panel TVs, PC
monitors, DVD players, PC desktops, and video game consoles.
This application note describes a set of reference designs able to transmit and receive DVI or
HDMI data streams up to 700 Mb/s using the native TMDS I/O interface featured by
Spartan®-3A FPGAs.
Introduction The DVI and HDMI protocols use TMDS at the physical level. TMDS throughput is a function of
the serial data rate of the video screen mode being transmitted. This in turn determines the
Spartan-3A FPGA speed grade that must be used to support this throughput.
FPGA Throughput and Video Screen Modes
Spartan-3A FPGAs feature native TMDS I/O with compliant differential voltage standards.
Table 1 shows the maximum throughput for each Spartan-3A FPGA speed grade.
Common video screen modes corresponding to these data rates are listed in Table 2.
Application Note: Spartan-3A Family
XAPP460 (v1.1) June 24, 2011
Video Connectivity Using TMDS I/O in
Spartan-3A FPGAs
Author: Bob Feng and Eric Crabill
Table 1: Spartan-3A Family TMDS I/O Throughput
Speed Grade Throughput
-5 700 Mb/s
-4 640 Mb/s
Table 2: Common Video Screen Modes
Screen Mode Pixel Rate
Serial Data
Rate
Color Depth
VGA (640x480@60 Hz) 25 MHz 250 Mb/s 24 bits
480p
(1)
(720x480@60 Hz) 27 MHz 270 Mb/s 24 bits
SVGA (800x600@60 Hz) 50 MHz 500 Mb/s 24 bits
XGA (1024x768@60 Hz) 65 MHz 650 Mb/s 24 bits
HDTV 720p
(1)
(1280x720@60 Hz) 74.25 MHz 742.5 Mb/s 24 bits
HDTV 1080i
(1)
(1920x1080@60 Hz interlaced) 74.25 MHz 742.5 Mb/s 24 bits
Notes:
1. Per CEA-861-D [Ref 1].
剩余35页未读，继续阅读
评论0