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人工智能-图像处理-基于FPGA和DSP的图像处理技术研究.pdf
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人工智能-图像处理-基于FPGA和DSP的图像处理技术研究.pdf
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摘要
I
摘要
图像作为人类信息的主要来源之一,图像处理技术对人们的重要性不言而喻。
目前,图像处理技术已经广泛应用于军事、工业和人们日常生活的各个方面。图
像处理平台主要有高性能的大型图像处理工作站、通用计算机和嵌入式系统。嵌
入式图像处理系统具有小巧、便携、灵活的特点,广泛应用于实时图像处理的场
合,其图像处理核心主要有专用的 ASIC 芯片、FPGA 和 DSP。ASIC 芯片速度高、
稳定,但是灵活性太差,只适合于特殊目的的应用。因此,研究基于 FPGA 和 DSP
的图像处理技术具有重要的意义。
本文以 FPGA 和 DSP 为平台,根据其各自自身特点和优势,结合数字图像处
理现有技术和知识,研究图像处理技术的实现方法, 主要工作有:
(1)介绍了 IUT656 数据格式和 VGA 工业标准时序,利用 FPGA 的并行流水
线特性,构建了基于 FPGA 的 IUT656 格式视频采集和 VGA 显示系统。
(2)设计了一种用于视频目标检测的 K 近邻分类器和 Avalon 总线接口,可
挂载于 Avalon 总线上,作为整个 SOPC 系统的一部分。
(3)确定了基于 TS201 的并行 SAR 图像去噪系统的框架结构,根据通信协
议,设计了数据接收与发送方法,移植优化了基于图像块的统计相似性度量的 SAR
图像降班算法。
本文工作得到了国家自然科学基金(No.60971128);华为创新研究计划项目
(No.IRP-2011-03-04)资助。
关键词:图像处理 FPGA DSP
ABSTRACT
III
ABSTRACT
As one of the main source of the information of human, image processing
technology played an import role in people's life. Currently, the image processing
technology has been widely used in military, industrial, and people's daily life. The main
platform of image processing are large-scale image processing workstation,
general-purpose computers and embedded system. Embedded image processing system
is compact, portable, flexible, and widely used in the occasion of the real-time image
processing. The core of embedded image processing system mainly contain ASIC,
FPGA and DSP. ASIC was high-speed and stable but poor flexibility, only suitable for
the application of the special purpose. So, studying the image processing technology
based on FPGA and DSP is very important.
The works in this paper are focus on the realization of image processing technology
based on FPGA and DSP , according to their own characteristics and existing
knowledge. The principal tasks are as follow:
(1) A IUT656 format video capture and VGA display system was designed. This
system take advantage of the parallel and pipelined characteristic of FPGA.
(2) A K-nearest neighbor classifier used for video object detection based on
FPGA and its Avalon bus interface were designed .It can be mounted on the Avalon bus
and as one part of the entire SOPC system.
(3) The structure of parallel SAR image denoising system based on TS201 was
determined. Data reception and transmission method according to the communication
protocol was designed. SAR image denoising algorithm based on the similarity measure
of statistics of the image block was transplanted and optimized on this system.
This work was supported by the National Natural Science Foundation of
China(No.60971128);Huwei innovation research project(No.IRP-2011-03-04).
Keywords: Image processing FPGA DSP
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