// TI File $Revision: /main/1 $
// Checkin $Date: August 18, 2006 13:46:06 $
//###########################################################################
//
// FILE: DSP2833x_DefaultIsr.c
//
// TITLE: DSP2833x Device Default Interrupt Service Routines.
//
// This file contains shell ISR routines for the 2833x PIE vector table.
// Typically these shell ISR routines can be used to populate the entire PIE
// vector table during device debug. In this manner if an interrupt is taken
// during firmware development, there will always be an ISR to catch it.
//
// As develpment progresses, these ISR rotuines can be eliminated and replaced
// with the user's own ISR routines for each interrupt. Since these shell ISRs
// include infinite loops they will typically not be included as-is in the final
// production firmware.
//
//###########################################################################
// $TI Release: DSP2833x Header Files V1.01 $
// $Release Date: September 26, 2007 $
//###########################################################################
#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h" // DSP2833x Examples Include File
// Connected to INT13 of CPU (use MINT13 mask):
// Note CPU-Timer1 is reserved for TI use, however XINT13
// ISR can be used by the user.
interrupt void INT13_ISR(void) // INT13 or CPU-Timer1
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// Note CPU-Timer2 is reserved for TI use.
interrupt void INT14_ISR(void) // CPU-Timer2
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void DATALOG_ISR(void) // Datalogging interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void RTOSINT_ISR(void) // RTOS interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void EMUINT_ISR(void) // Emulation interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void NMI_ISR(void) // Non-maskable interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm(" ESTOP0");
for(;;);
}
interrupt void USER1_ISR(void) // User Defined trap 1
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER2_ISR(void) // User Defined trap 2
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER3_ISR(void) // User Defined trap 3
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER4_ISR(void) // User Defined trap 4
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER5_ISR(void) // User Defined trap 5
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER6_ISR(void) // User Defined trap 6
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER7_ISR(void) // User Defined trap 7
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER8_ISR(void) // User Defined trap 8
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER9_ISR(void) // User Defined trap 9
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER10_ISR(void) // User Defined trap 10
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER11_ISR(void) // User Defined trap 11
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER12_ISR(void) // User Defined trap 12
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// -----------------------------------------------------------
// PIE Group 1 - MUXed into CPU INT1
// -----------------------------------------------------------
// INT1.1
interrupt void SEQ1INT_ISR(void) //SEQ1 ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.2
interrupt void SEQ2INT_ISR(void) //SEQ2 ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm(" ESTOP0");
for(;;);
}
// INT1.3 - Reserved
// INT1.4
interrupt void XINT1_ISR(void)
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.5
interrupt void XINT2_ISR(void)
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.6
interrupt void ADCINT_ISR(void) // ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.7
interrupt void TINT0_ISR(void) // CPU-Timer 0
{
// Insert ISR Code here
// To
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1、基于DSP28335的SCI模块实现RS485收发功能; 2、该工程采用的是程序控制的收发模式,若是自收发的RS485将控制GPIO注释即可; 3、该工程同样适用于RS422,将控制收发的GPIO功能和延迟注释即可; 4、该工程中有FIFO发送中断(默认发送方式),也包含采用BUF非中断的发送代码; 5、该工程的接收模块采用的是FIFO中断接收
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收起资源包目录
SCIA_RS485_FIFO.rar (132个子文件)
DSP2833x_CodeStartBranch.asm 3KB
DSP2833x_usDelay.asm 3KB
DSP2833x_ADC_cal.asm 1KB
DSP2833x_DefaultIsr.c 30KB
DSP2833x_SysCtrl.c 11KB
DSP2833x_GlobalVariableDefs.c 11KB
DSP2833x_Xintf.c 9KB
SCI.c 8KB
DSP2833x_PieVect.c 7KB
DSP2833x_Sci.c 6KB
DSP2833x_Spi.c 4KB
DSP2833x_CpuTimers.c 4KB
DSP2833x_PieCtrl.c 3KB
.ccsproject 252B
RS485TX.ccxml 973B
.cdtbuild 16KB
.cdtbuild_initial 16KB
.cdtproject 553B
SYMBOL.CDX 313KB
FILE.CDX 3KB
DSP2833x_Headers_nonBIOS.cmd 8KB
28335_RAM_lnk.cmd 4KB
.cproject 31KB
DSP2833x_DefaultIsr.d 7KB
DSP2833x_CpuTimers.d 7KB
DSP2833x_SysCtrl.d 7KB
DSP2833x_PieVect.d 7KB
DSP2833x_PieCtrl.d 7KB
DSP2833x_Xintf.d 7KB
DSP2833x_Sci.d 7KB
DSP2833x_Spi.d 7KB
SCI.d 7KB
DSP2833x_GlobalVariableDefs.d 5KB
SYMBOL.DBF 232KB
FILE.DBF 1KB
SYMBOL.FPT 399KB
FILE.FPT 2KB
DSP2833x_SWPrioritizedIsrLevels.h 142KB
IQmathLib.h 123KB
DSP2833x_ECan.h 44KB
DSP2833x_Mcbsp.h 31KB
DSP2833x_EPwm.h 16KB
DSP2833x_Gpio.h 16KB
DSP2833x_DMA.h 13KB
DSP2833x_SysCtrl.h 13KB
DSP2833x_Adc.h 10KB
DSP2833x_EQep.h 10KB
DSP2833x_GlobalPrototypes.h 8KB
DSP2833x_Sci.h 8KB
DSP2833x_I2c.h 7KB
DSP2833x_PieVect.h 6KB
DSP2833x_DefaultIsr.h 6KB
DSP2833x_Spi.h 6KB
DSP2833x_ECap.h 6KB
DSP2833x_PieCtrl.h 6KB
DSP2833x_CpuTimers.h 6KB
DSP2833x_Device.h 6KB
DSP2833x_Examples.h 5KB
DSP2833x_I2c_defines.h 4KB
DSP2833x_EPwm_defines.h 4KB
DSP2833x_Xintf.h 4KB
SFO_V5.h 3KB
DSP2833x_DevEmu.h 3KB
DSP2833x_XIntrupt.h 2KB
SFO.h 2KB
DSP2833x_Dma_defines.h 2KB
DSP2833x_Project.h 720B
lab12-SCIB_RS485_PC.launch 5KB
SCIA_RS485_FIFO_PCV1.launch 5KB
SCIA_RS485_FIFO_PCV2.launch 5KB
Debug.lkf 2KB
cc_build_Debug.log 525B
makefile 5KB
SCI.map 41KB
subdir.mk 12KB
subdir_vars.mk 3KB
sources.mk 2KB
subdir_rules.mk 2KB
subdir.mk 2KB
subdir_rules.mk 2KB
subdir_vars.mk 564B
objects.mk 259B
DSP2833x_GlobalVariableDefs.obj 125KB
DSP2833x_GlobalVariableDefs.obj 119KB
DSP2833x_DefaultIsr.obj 33KB
SCI.obj 32KB
DSP2833x_DefaultIsr.obj 29KB
SCI.obj 18KB
DSP2833x_PieVect.obj 18KB
DSP2833x_PieVect.obj 17KB
DSP2833x_SysCtrl.obj 17KB
DSP2833x_Xintf.obj 17KB
DSP2833x_Xintf.obj 16KB
DSP2833x_SysCtrl.obj 16KB
DSP2833x_Sci.obj 13KB
DSP2833x_Spi.obj 13KB
DSP2833x_Sci.obj 13KB
DSP2833x_Spi.obj 12KB
DSP2833x_CpuTimers.obj 6KB
DSP2833x_PieCtrl.obj 6KB
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