################################################################################
# Vivado (TM) v2017.4 (64-bit)
#
# README.txt: Please read the sections below to understand the steps required
# to simulate the design for a simulator, the directory structure
# and the generated exported files.
#
################################################################################
1. Simulate Design
To simulate design, cd to the simulator directory and execute the script.
For example:-
% cd questa
% ./top.sh
The export simulation flow requires the Xilinx pre-compiled simulation library
components for the target simulator. These components are referred using the
'-lib_map_path' switch. If this switch is specified, then the export simulation
will automatically set this library path in the generated script and update,
copy the simulator setup file(s) in the exported directory.
If '-lib_map_path' is not specified, then the pre-compiled simulation library
information will not be included in the exported scripts and that may cause
simulation errors when running this script. Alternatively, you can provide the
library information using this switch while executing the generated script.
For example:-
% ./top.sh -lib_map_path /design/questa/clibs
Please refer to the generated script header 'Prerequisite' section for more details.
2. Directory Structure
By default, if the -directory switch is not specified, export_simulation will
create the following directory structure:-
<current_working_directory>/export_sim/<simulator>
For example, if the current working directory is /tmp/test, export_simulation
will create the following directory path:-
/tmp/test/export_sim/questa
If -directory switch is specified, export_simulation will create a simulator
sub-directory under the specified directory path.
For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim'
command will create the following directory:-
/tmp/test/my_test_area/func_sim/questa
By default, if -simulator is not specified, export_simulation will create a
simulator sub-directory for each simulator and export the files for each simulator
in this sub-directory respectively.
IMPORTANT: Please note that the simulation library path must be specified manually
in the generated script for the respective simulator. Please refer to the generated
script header 'Prerequisite' section for more details.
3. Exported script and files
Export simulation will create the driver shell script, setup files and copy the
design sources in the output directory path.
By default, when the -script_name switch is not specified, export_simulation will
create the following script name:-
<simulation_top>.sh (Unix)
When exporting the files for an IP using the -of_objects switch, export_simulation
will create the following script name:-
<ip-name>.sh (Unix)
Export simulation will create the setup files for the target simulator specified
with the -simulator switch.
For example, if the target simulator is "ies", export_simulation will create the
'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib'
file.
没有合适的资源?快使用搜索试试~ 我知道了~
FPGA片内ROM测试实验
共403个文件
txt:39个
v:36个
do:28个
需积分: 5 1 下载量 25 浏览量
2023-09-30
23:50:59
上传
评论
收藏 32.38MB RAR 举报
温馨提示
FPGA片内ROM测试实验
资源推荐
资源详情
资源评论
收起资源包目录
FPGA片内ROM测试实验 (403个子文件)
xsim.ini.bak 19KB
elaborate.bat 944B
compile.bat 838B
simulate.bat 804B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
rom_test.bit 3.86MB
xsim_1.c 9KB
rom_init.coe 336B
rom_init.coe 336B
rom_init.coe 336B
rom_init.coe 336B
rom_init.coe 336B
rom_init.coe 336B
rom_init.coe 336B
rom_init.coe 336B
rom_init.coe 336B
rom_init.coe 336B
xsim.dbg 74KB
rom_test_routed.dcp 1.58MB
rom_test_placed.dcp 1.39MB
rom_test_opt.dcp 1.11MB
ila_0.dcp 585KB
ila_0.dcp 585KB
ila_0.dcp 584KB
dbg_hub_CV.dcp 322KB
rom_ip.dcp 24KB
rom_ip.dcp 24KB
rom_ip.dcp 24KB
rom_test.dcp 8KB
compile.do 902B
compile.do 878B
compile.do 837B
compile.do 827B
compile.do 770B
compile.do 736B
compile.do 686B
compile.do 672B
simulate.do 327B
simulate.do 319B
simulate.do 319B
simulate.do 303B
simulate.do 294B
simulate.do 294B
elaborate.do 199B
simulate.do 189B
simulate.do 187B
elaborate.do 175B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
simulate.do 11B
simulate.do 11B
xsimk.exe 136KB
run.f 493B
run.f 461B
usage_statistics_webtalk.html 156KB
hw_ila_data_1.ila 76KB
.xsim_webtallk.info 64B
xsim.ini 19KB
xsim.ini 19KB
xsim.ini 19KB
xsimSettings.ini 735B
webtalk_31464.backup.jou 860B
webtalk.jou 860B
vivado.jou 710B
vivado.jou 703B
vivado.jou 702B
vivado.jou 697B
ISEWrap.js 7KB
ISEWrap.js 7KB
ISEWrap.js 7KB
ISEWrap.js 7KB
rundef.js 1KB
rundef.js 1KB
rundef.js 1KB
rundef.js 1KB
runme.log 116KB
runme.log 115KB
runme.log 45KB
runme.log 30KB
runme.log 29KB
runme.log 18KB
elaborate.log 1020B
webtalk_31464.backup.log 929B
webtalk.log 929B
summary.log 898B
summary.log 898B
summary.log 898B
summary.log 898B
summary.log 898B
summary.log 898B
summary.log 898B
共 403 条
- 1
- 2
- 3
- 4
- 5
资源评论
须尽欢~~
- 粉丝: 0
- 资源: 38
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功