+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Legal Partition Candidates ;
+------------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
+------------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
; DDS_din|DDS_rom0|altsyncram_component|auto_generated ; 13 ; 0 ; 0 ; 0 ; 12 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; DDS_din|DDS_rom0 ; 13 ; 0 ; 0 ; 0 ; 12 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; DDS_din ; 47 ; 45 ; 0 ; 45 ; 12 ; 45 ; 45 ; 45 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; DDS|DDS_rom0|altsyncram_component|auto_generated ; 13 ; 0 ; 0 ; 0 ; 12 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; DDS|DDS_rom0 ; 13 ; 0 ; 0 ; 0 ; 12 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
; DDS ; 47 ; 45 ; 0 ; 45 ; 12 ; 45 ; 45 ; 45 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+------------------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
基于FPGA的数字混频器设计
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2022-09-16
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基于FPGA的数字混频器设计 （181个子文件） 
_info 2KB _vmake 26B Mixer.vpr.ammdb 1KB Mixer.root_partition.cmp.ammdb 1KB Mixer.map.ammdb 123B Mixer_run_msim_rtl_verilog.do.bak 765B Mixer_tb.v.bak 380B Mixer_run_msim_rtl_verilog.do.bak1 765B Mixer_run_msim_rtl_verilog.do.bak10 834B Mixer_run_msim_rtl_verilog.do.bak11 754B Mixer_run_msim_rtl_verilog.do.bak2 910B Mixer_run_msim_rtl_verilog.do.bak3 914B Mixer_run_msim_rtl_verilog.do.bak4 914B Mixer_run_msim_rtl_verilog.do.bak5 914B Mixer_run_msim_rtl_verilog.do.bak6 914B Mixer_run_msim_rtl_verilog.do.bak7 914B Mixer_run_msim_rtl_verilog.do.bak8 914B Mixer_run_msim_rtl_verilog.do.bak9 914B Mixer.map.bpm 692B Mixer.root_partition.cmp.cdb 15KB Mixer.rtlv_sg.cdb 13KB Mixer.map.cdb 12KB Mixer.root_partition.map.cdb 11KB Mixer.sgdiff.cdb 11KB Mixer.(1).cnf.cdb 5KB Mixer.(4).cnf.cdb 5KB Mixer.(8).cnf.cdb 5KB Mixer.(0).cnf.cdb 3KB Mixer.rtlv_sg_swap.cdb 2KB Mixer.(2).cnf.cdb 2KB Mixer.map_bb.cdb 2KB Mixer.(3).cnf.cdb 1KB Mixer.(7).cnf.cdb 1KB Mixer.(6).cnf.cdb 1KB Mixer.(5).cnf.cdb 1KB Mixer.root_partition.map.hbdb.cdb 1KB Mixer.root_partition.map.reg_db.cdb 1KB _primary.dat 2KB _primary.dat 945B _primary.dat 889B _primary.dat 449B logic_util_heursitic.dat 0B Mixer.db_info 140B Mixer.db_info 140B _primary.dbs 1KB _primary.dbs 1KB _primary.dbs 1KB _primary.dbs 810B Mixer.tiscmp.slow_1200mv_85c.ddb 172KB Mixer.tiscmp.slow_1200mv_0c.ddb 172KB Mixer.tiscmp.fast_1200mv_0c.ddb 171KB Mixer.tiscmp.fastest_slow_1200mv_85c.ddb 113KB Mixer.tiscmp.fastest_slow_1200mv_0c.ddb 113KB Mixer.tis_db_list.ddb 234B Mixer.pti_db_list.ddb 177B Mixer.root_partition.cmp.dfp 33B Mixer_run_msim_rtl_verilog.do 754B Mixer.done 26B Mixer.root_partition.map.dpi 2KB Mixer.root_partition.map.hbdb.hb_info 46B Mixer.sgdiff.hdb 19KB Mixer.root_partition.cmp.hdb 19KB Mixer.pre_map.hdb 18KB Mixer.rtlv.hdb 18KB Mixer.map.hdb 17KB Mixer.root_partition.map.hdb 17KB Mixer.root_partition.map.hbdb.hdb 17KB Mixer.map_bb.hdb 11KB Mixer.(1).cnf.hdb 2KB Mixer.(0).cnf.hdb 2KB Mixer.(2).cnf.hdb 1KB Mixer.(7).cnf.hdb 791B Mixer.(3).cnf.hdb 789B Mixer.(4).cnf.hdb 740B Mixer.(8).cnf.hdb 728B Mixer.(5).cnf.hdb 575B Mixer.(6).cnf.hdb 546B Mixer.hier_info 32KB Mixer.hif 2KB Mixer.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd 729KB Mixer.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd 728KB Mixer.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd 723KB
Mixer.lpc.html 2KB Mixer.cmp.idb 11KB modelsim.ini 11KB Mixer.ipinfo 326B Mixer.jdi 224B Mixer.root_partition.map.kpt 3KB Mixer.map.kpt 3KB Mixer.cmp_merge.kpt 209B Mixer.cmp.kpt 205B Mixer.root_partition.cmp.kpt 205B Mixer.root_partition.cmp.logdb 182B Mixer.map.logdb 94B Mixer.map_bb.logdb 94B sin.mif 60KB sin.mif 60KB sin12bit.mif 55KB sin12bit.mif 55KB msim_transcript 3KB共 181 条
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