ST7701S
Datasheet
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2013 Sitronix Technology Corporation. All rights reserved.
Preliminary Version 0.2
2017/03
ST7701S
Version 0.2 Page 2 of 310 2017/03
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
LIST OF CONTENT
1
GENERAL DESCRIPTION...................................................................................................................................8
2
FEATURES..............................................................................................................................................................9
3
PAD ARRANGEMENT........................................................................................................................................ 11
3.1
O
UTPUT
B
UMP
D
IMENSION
............................................................................................................................. 11
3.2
I
NPUT
B
UMP
D
IMENSION
................................................................................................................................12
3.3
A
LIGNMENT
M
ARK
D
IMENSION
.....................................................................................................................13
3.4
C
HIP
I
NFORMATION
........................................................................................................................................13
4
PAD CENTER COORDINATES (AFTER HEAT CORRECTION)................................................................14
5
BLOCK DIAGRAM .............................................................................................................................................35
6
PIN DESCRIPTION .............................................................................................................................................36
6.1
P
OWER
S
UPPLY
P
INS
.......................................................................................................................................36
6.2
B
US
I
NTERFACE
P
INS
......................................................................................................................................37
6.3
D
RIVER
O
UTPUT
P
INS
.....................................................................................................................................40
6.4
T
EST AND OTHER PINS
....................................................................................................................................40
7
DRIVER ELECTRICAL CHARACTERISTICS ..............................................................................................42
7.1
A
BSOLUTE
O
PERATION
R
ANGE
.......................................................................................................................42
7.2
DC
C
HARACTERISTICS
...................................................................................................................................43
7.3
DC
C
HARACTERISTICS
...................................................................................................................................45
7.4
P
OWER
C
ONSUMPTION
...................................................................................................................................46
7.5
AC
C
HARACTERISTICS
...................................................................................................................................47
7.5.1
Serial Interface Characteristics (3-line serial):........................................................................................47
7.5.2
Serial Interface Characteristics (4-line serial):........................................................................................48
7.5.3
RGB Interface Characteristics : ...............................................................................................................49
7.5.4
MIPI Interface Characteristics:................................................................................................................50
7.5.4.1
High Speed Mode.................................................................................................................................50
7.5.4.2
Lowe Power Mode ...............................................................................................................................51
7.5.4.3
DSI Bursts Mode ..................................................................................................................................52
7.5.5
Reset Timing: ............................................................................................................................................54
8
FUNCTION DESCRIPTION...............................................................................................................................56
8.1
S
YSTEM
I
NTERFACE
........................................................................................................................................56
8.2
S
ERIAL
I
NTERFACE
.........................................................................................................................................57
8.2.1
Serial Interface (SPI)................................................................................................................................58
8.2.1.1
Command write mode ..........................................................................................................................58
ST7701S
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disclosed in whole or in part without prior written permission of Sitronix.
8.2.2
Read function............................................................................................................................................60
8.3
16
BIT
S
ERIAL
I
NTERFACE
...............................................................................................................................64
8.3.1
Write Mode................................................................................................................................................64
8.3.2
Read Mode................................................................................................................................................66
8.4
D
ATA
T
RANSFER
B
REAK AND
R
ECOVERY
.......................................................................................................68
8.5
D
ATA
T
RANSFER
P
AUSE
..................................................................................................................................70
8.5.1
SPI interface pause ...................................................................................................................................71
8.6
RGB
I
NTERFACE
.............................................................................................................................................72
8.6.1
RGB Color Format ...................................................................................................................................73
8.6.2
RGB Interface Definition ..........................................................................................................................74
8.6.3
RGB Interface Mode Selection..................................................................................................................75
8.6.4
RGB Interface Timing ...............................................................................................................................75
8.7
MIPI-DSI
INTERFACE
.....................................................................................................................................77
8.7.1
Display Module Pin Configuration for DSI.............................................................................................. 78
8.7.2
Display Serial Interface (DSI) ..................................................................................................................79
8.7.2.1
General description..............................................................................................................................79
8.7.2.2
Interface level communication .............................................................................................................79
8.7.2.2.1
General ................................................................................................................................................79
8.7.2.2.2
DSI-CLK Lanes....................................................................................................................................81
8.7.2.2.2.1
Low Power Mode (LPM).................................................................................................................82
8.7.2.2.2.2
Ultra Low Power Mode (ULPM) ....................................................................................................84
8.7.2.2.2.3
High-speed Clock Mode (HSCM)....................................................................................................85
8.7.2.2.3
DSI-DATA LANES................................................................................................................................87
8.7.2.2.3.1
GENERAL .......................................................................................................................................87
8.7.2.2.3.2
ESCAPE MODE..............................................................................................................................88
8.7.2.2.3.3
HIGH SPEED DATA TRANSMISSION (HSDT)..............................................................................95
8.7.2.3
Packet Level Communication.............................................................................................................100
8.7.2.3.1
Short Packet (SPA) And Long Packet (LPA) Structure .......................................................................100
8.7.2.3.1.1
Bit Order of the Byte on Packets ...................................................................................................101
8.7.2.3.1.2
Bit Order of the Multiple Byte Information on Packets.................................................................101
8.7.2.3.1.3
Pack Header (PH).........................................................................................................................102
8.7.2.3.1.4
Packet Data (PD) on the Long Packet (LPa)................................................................................ 114
8.7.2.3.1.5
Packet Footer (PF) on the Long Packet (LPa).............................................................................. 114
8.7.2.3.2
Packet Transmissions ......................................................................................................................... 116
8.7.2.3.2.1
Packet from the MCU to the Display Module................................................................................ 116
8.7.2.3.2.2
PACKET FROM THE DISPLAY MODULE TO THE MCU ..........................................................139
8.7.2.3.3
COMMUNICATION SEQUENCES ...................................................................................................151
8.7.2.3.3.1
GENERAL .....................................................................................................................................151
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Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
8.7.2.3.3.2
SEQUENCES ................................................................................................................................152
8.7.2.4
Video Mode Communication ..............................................................................................................157
8.7.2.4.1
TRANSMISSION PACKET SEQUENCES..........................................................................................157
8.7.2.4.2
NON-BURST MODE WITH SYNC PULSES......................................................................................159
8.7.2.4.3
NON-BURST MODE..........................................................................................................................160
8.7.2.4.4
BURST MODE ...................................................................................................................................161
9
POWER ON/OFF SEQUENCE.........................................................................................................................162
9.1
U
NCONTROLLED
P
OWER
O
FF
.......................................................................................................................163
10
POWER LEVEL DEFINITION ........................................................................................................................164
10.1
P
OWER
L
EVEL
..............................................................................................................................................164
10.2
P
OWER
F
LOW
C
HART
...................................................................................................................................165
10.3
S
LEEP
O
UT
–C
OMMAND AND SELF
-
DIAGNOSTIC FUNCTIONS OF THE DISPLAY MODULE
................................167
10.3.1
Register loading Detection.................................................................................................................167
10.3.2
Functionality Detection......................................................................................................................168
11
GAMMA CORRECTION ..................................................................................................................................169
11.1
G
RAY VOLTAGE GENERATOR FOR DIGITAL GAMMA CORRECTION
...................................................................174
11.2
D
ISPLAY
D
IMMING
.......................................................................................................................................175
11.3
C
ONTENT
A
DAPTIVE
B
RIGHTNESS
C
ONTROL
(CABC) .................................................................................178
12
COMMAND ........................................................................................................................................................184
12.1
C
OMMAND
T
RANSMISSION
M
ODE ON
MIPI
I
NTERFACE
...............................................................................184
12.2
S
YSTEM
F
UNCTION
C
OMMAND
T
ABLE
1.......................................................................................................184
12.2.1
NOP (00/0000h).................................................................................................................................187
12.2.2
SWRESET (01h/0100h): Software Reset ............................................................................................188
12.2.3
RDDID (04h/0400h~0402h): Read Display ID .................................................................................189
12.2.4
RDNUMED (05h/0500h): Read Number of Errors on DSI................................................................190
12.2.5
RDRED (06h/0600h): Read the first pixel of Red Color....................................................................191
12.2.6
RDGREEN (07h/0700h): Read the first pixel of Green Color ...........................................................192
12.2.7
RDBLUE (08h/0800h): Read the first pixel of Blue Color.................................................................193
12.2.8
RDDPM (0Ah/0A00h): Read Display Power Mode...........................................................................194
12.2.9
RDDMADCTL (0Bh/0B00h): Read Display MADCTL......................................................................195
12.2.10
RDDCOLMOD (0Ch/0C00h): Read Display Pixel Format...............................................................196
12.2.11
RDDIM (0Dh/0D00h): Read Display Image Mode............................................................................197
12.2.12
RDDSM (0Eh/0E00h): Read Display Signal Mode............................................................................198
12.2.13
RDDSDR (0Fh/0F00h): Read Display Self-Diagnostic Result ..........................................................199
12.2.14
SLPIN (10h/1000h): Sleep in .............................................................................................................200
ST7701S
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Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
12.2.15
SLPOUT (11h/1100h): Sleep Out.......................................................................................................201
12.2.16
PTLON (12h/1200h): Partial Display Mode On................................................................................202
12.2.17
NORON (13h/1300h): Normal Display Mode On..............................................................................203
12.2.18
INVOFF (20h/2000h): Display Inversion Off ....................................................................................204
12.2.19
INVON (21h/2100h): Display Inversion On.......................................................................................205
12.2.20
ALLPOFF (22h/2200h): All Pixel Off................................................................................................206
12.2.21
ALLPON (23h/2300h): All Pixel ON..................................................................................................207
12.2.22
GAMSET (26h/2600h): Gamma Set...................................................................................................208
12.2.23
DISPOFF (28h/2800h): Display Off..................................................................................................209
12.2.24
DISPON (29h/2900h): Display On ....................................................................................................210
12.2.25
TEOFF (34h/3400h):Tearing Effect Line OFF.................................................................................. 211
12.2.26
TEON (35h/3500h):Tearing Effect Line ON ......................................................................................212
12.2.27
MADCTL(36h/3600h): Display data access control..........................................................................214
12.2.28
IDMOFF (38h/3800h): Idle Mode Off...............................................................................................215
12.2.29
IDMON (39h/3900h): Idle Mode On..................................................................................................216
12.2.30
COLMOD (3Ah/3A00h): Interface Pixel Format...............................................................................218
12.2.31
GSL (45h): Get Scan Line..................................................................................................................219
12.2.32
WRDISBV (51h): Write Display Brightness.......................................................................................220
12.2.33
RDDISBV (52h/5200h): Read Display Brightness Value...................................................................221
12.2.34
WRCTRLD (53h/5300h): Write CTRL Display ..................................................................................222
12.2.35
RDCTRLD (54h): Read CTRL Value Display ....................................................................................224
12.2.36
WRCACE (55h/5500h): Write Content Adaptive Brightness Control and Color Enhancement.........225
12.2.37
RDCABC (56h/5600h): Read Content Adaptive Brightness Control .................................................227
12.2.38
WRCABCMB (5Eh/5E00h): Write CABC Minimum Brightness ........................................................229
12.2.39
RDCABCMB (5Fh/5F00h): Read CABC Minimum Brightness.........................................................230
12.2.40
RDABCSDR (68h/6800h): Read Automatic Brightness Control Self-Diagnostic Result ...................231
12.2.41
RDBWLB (70h/7000h):Read Black/White Low Bits ..........................................................................232
12.2.42
RDBkx (71h/7100h):Read Bkx ...........................................................................................................233
12.2.43
RDBky (72h/7200h):Read Bky ...........................................................................................................234
12.2.44
RDWx (73h/7300h):Read Wx.............................................................................................................235
12.2.45
RDWy (74h/7400h):Read Wy..............................................................................................................236
12.2.46
RDRGLB (75h/7500h):Read Red/Green Low Bits .............................................................................237
12.2.47
RDRx (76h/7600h):Read Rx...............................................................................................................238
12.2.48
RDRy (77h/7700h):Read Ry...............................................................................................................239
12.2.49
RDGx (78h/7800h):Read Gx..............................................................................................................240
12.2.50
RDGy (79h/7900h):Read Gy..............................................................................................................241
12.2.51
RDBALB (7Ah/7A00h):Read Blue/A Color Low Bits.........................................................................242
12.2.52
RDBx (7Bh/7B00h):Read Bx..............................................................................................................243
