RF Agile Transceiver
TM
ADI Confidential
AD80305
Rev. Sp1
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.
FEATURES
RF Transceiver with Integrated ADCs and DACs
- Single Receiver, Single Transmit
- RF Rx Tuning Range: 70 MHz – 4.0 GHz
- RF Tx Tuning Range: 70 MHz – 4.0 GHz
- Tunable Channel BW: 200 KHz < BW < 56 MHz
- Supports TDD, HFDD, and FDD operation
- Superior Receiver sensitivity with NF < 2.5dB
- Highly linear and spectrally pure transmitter
- Tx EVM -40 dB
- Tx noise < -155dBm/Hz noise @ 70 MHz Offset
- Tx monitor: > 66dB dynamic range with 1dB
accuracy
- Integrated Frac-N Synthesizer
- 2.5 Hz maximum LO step size
- Integrated phase noise < 0.37ºrms @ 2.3 GHz
- Multi-Chip Synchronization
- CMOS/LVDS Digital Interface
APPLICATIONS
General Purpose Radios
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The AD80305 is a highly integrated, RF agile transceiver offering a
single receiver and transmitter. This extraordinarily versatile
transceiver combines the RF front-end with mixed-signal base-
band enabling an easy-to-use CMOS/LVDS digital interface to the
base-band ASIC or FPGA. The AD80305 operates in the 70 MHz
to 4.0 GHz range. Channel bandwidths of 200 KHz to 56 MHz are
supported.
The direct-conversion receiver has state-of-the-art noise figure and
linearity. The complete Rx sub-system includes autonomous
automatic gain control (AGC), DC offset correction, quadrature
correction, and digital filtering thus eliminating the need for these
functions in the digital baseband.
In addition to the autonomous AGC, the AD80305 also has
external gain control modes, allowing significant flexibility in
setting system level gain. With this freedom, system designers can
optimize the signal level within the receiver and achieve the
maximum dynamic range from the device.
The received signals are digitized with a set of four high dynamic
range ADCs. The 128-tap FIR decimation and channel filters
produce a 12-bit output signal at the appropriate sample rate. The
transmit path takes a 12-bit input data and interpolates before
converting to the analog domain and up-converting to the carrier
frequency.
The transmitter uses an innovative direct conversion modulator,
which achieves high modulation accuracy with exceptionally low
noise, eliminating the need for external transmit SAW filters. In
addition, the AD80305 offers best in class Tx EVM of -40 dB,
which allows significant system margin for the external PA. The
onboard Tx monitor can be used as a Tx Power Detector with 66
dB of dynamic range enabling highly accurate power measurements
or it can be used as a phase detector for the synchronization of
multiple chips.
The fully integrated phase locked loops (PLLs) provide high
performance, low power fractional-N frequency synthesis for both
receive and transmit sections. Special precautions have been taken
to provide the isolation demanded by Frequency Division Duplex
(FDD) systems. All VCO and loop filter components are integrated.
The core of the AD80305 can be powered directly from a 1.3V
switching regulator. The IC is controlled via a standard 4 wire serial
port and 4 real-time I/O control pins. Comprehensive power down
modes are included to minimize power consumption in normal
use. The AD80305 is packaged in a 10 mm × 10 mm, 144-Ball chip
scale ball grid array (CSP_BGA).
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