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# SJ201 Datasheet - Rev 8 This board interfaces directly to the Raspberry Pi 4 via the 40-pin GPIO adding a high-quality speaker and microphone array, as well as LEDs and hardware inputs for non-voice interaction and feedback. The part number SJ201 is derived from Mike鈥檚 鈥淪imon Jester鈥� alias in 鈥淭he Moon is a Harsh Mistress鈥�. <img src="../../images/pcb-render-SJ-201-R6-back.png" width="500"> <img src="../../images/pcb-render-SJ-201-R6-front.png" width="500"> ## About this Document This Datasheet will contain all the relevant information for the manufacturing of the SJ201 including information about PCB design, PCB manufacturing process. ## Major Components * Audio Front End (XMOS XVF3510) - for Microphone input processing * 23W I2S Digital Amplifier (Texas Instruments TAS5806MD) * 2 Digital MEMS Microphones ([Knowles SPK0641HT4H-1](https://www.digikey.com/en/products/detail/knowles/SPK0641HT4H-1/8573345)) * 12 RGB LEDs (WorldSemi WS2812B-MINI) * 3 momentary buttons (volume up, volume down, action) * 1 toggle switch (mic mute) * ATtiny1614 - control LEDs, other I/O ## Hardware Notes - The SJ201 is plugged into the GPIO header of the Raspberry Pi 4 board. - The pins required for the operation of the Raspberry Pi 4 MIPI and CSI are not used on the SJ201 GPIO header. The display and camera do not connect to the SJ201. - The barrel jack on the SJ201 requires a 12V, 3A regulated DC input. ## Software Notes - SHTDN (GPIO pin GPIO5) must be set high to enable the audio amplifier. - The TAS5806 outputs I2S to the XMOS chip. ## Configuration options ### Default Use Case The SJ201 is connected to a Raspberry Pi4 via the header.聽 12V is supplied to the SJ201 via the barrel jack. The SJ201 creates 5V using a 3A buck converter, which powers the Raspberry Pi. The SJ201 creates 3.3V using a linear regulator, which powers the on-board devices. 4.4ohm, 5W speakers are connected to the JST connectors. [Note, in the current implementation the amplifier is capable of supplying 13W to each speaker, so volume must be limited in software to avoid damage.] ### Test Configuration Options The J5 header serves as a test point for the 3.3V, 5V and 12V supplies.聽 The J5 header can also be used to bypass the on-board buck converter and/or linear regulator. The buck converter does not need to be turned off - it can tolerate an external supply. To completely disable it, lift the appropriate pin. The 1.0V supply can be tested using Test Point TP1_0V1 near the XMOS IC. ## Design Notes ### Power Domains The SJ201 is powered by an external 12V 3A DC supply (wall wart) via a barrel connector. The SJ201 has 4 voltage domains: - VDD 12V externally supplied power - PVDD 12V Analog Audio Power - 5V 5V derived from VDD - 3V 3.3V derived from 5V - 1V 1.0V derived from 5V for the XMOS core All power domains share a common ground. - GND Ground ### Microphone DSP ### Audio Amplifier **Filterless modulation** We are using the TAS5806, in a "filterless amplifier" design. This is lower cost than using a true LC filter for each output, but can be susceptible to large EMI output if not done properly. This can lead to failure to meet FCC and other standards required for consumer electronics. The following design rules are intended to minimize EMI in the system. **Speaker power** With a 4ohm speaker and a 12V supply, each channel can achieve ~13W. The speaker we're using is 4.4ohm, 5W max. The volume must be limited in software to avoid damaging the speaker. ## PCB Layout Checklist Boxes marked 馃椆 are for version 6.02 (also labeled R6 v2) of the KiCAD files. ### Layers - PCB checklist Layer 1: Main ICs, connectors and signal routing - Power (1.0v, PVDD 12v) Layer 2: GND Layer 3: Power (12V, 5V, 3V3) Layer 4: Buttons, LEDs, signal routing (this layer faces upwards on device)聽 ### Power - PCB checklist #### External Power Supply (VDD) 1. Barrel jack is centered on 10.6mm from the board edge. 2. Ferrite bead close to barrel jack to reduce EMI transmission along power cord to wall - Spec'd to handle 12V 3A 3. AO3401A MOSFET to protect against reverse voltage (i.e. user plugs in a non-standard external power supply with GND on the center pin instead of on the outside of the barrel connector.) 4. Low resistance traces for VDD and GND connecting to power planes. #### Analog Audio Power (PVDD) 1. PVDD does not contain loops (areas of PVDD that enclose non-PVDD areas) 2. PVDD does not contain narrow antenna-like features. 3. PVDD is primarily located on layer 3 4. PVDD connects to layer 1 traces through multiple vias for lower resistance 5. See Audio Amplifier for additional considerations #### 5V power XL Semiconductor's XL4015 buck converter is used to generate 5V at up to 5A from the barrel jack power. This part supports a minimum input voltage of 8V and a max of 36V.聽 馃椆 <http://www.xlsemi.com/datasheet/XL4015%20datasheet.pdf> 馃椆 R1 and R8 are 1% tolerance (these set the output voltage. 10% resistors could result in an output range of 4.4V - 5.9V.) #### 3.3V power A linear regulator is used to derive 3.3V from 5V. - AZ1117CH-3.3 - <https://www.diodes.com/assets/Datasheets/AZ1117C.pdf>聽 ### Microphones (MP34DT05-A)- PCB checklist 馃椆 <https://www.st.com/content/ccc/resource/technical/document/datasheet/group3/c7/90/d3/f6/b7/e7/40/c8/DM00415595/files/DM00415595.pdf/jcr:content/translations/en.DM00415595.pdf>聽 馃椆 Power supply decoupling capacitors (100 nF ceramic, 1 渭F ceramic) should be placed as near as possible to pin 1 of the device (common design practice).聽 馃椆 The L/R pin must be connected to Vdd or GND (refer to Table 6. L/R channel selection). ### LED (WS2812B-Mini)- PCB checklist 馃椆 <https://datasheet.lcsc.com/szlcsc/2005251033_Worldsemi-WS2812B-Mini_C527089.pdf> ### Power on Reset - PCB checklist - <https://www.onsemi.com/pub/Collateral/NCP302-D.PDF>聽 - ~~This circuit monitors multiple power supply rails for undervoltage conditions. If any of the three power supplies are in an undervoltage condition, the NCP302 reset output will be immediately set to an active low level. All three power supplies must be above their minimum voltage levels for the NCP302 reset output to generate a "Power Good" level (Reset Output = Power Supply 1 or VP).~~ Replaced by Raspberry Pi control for startup routine. ### SG-210STF 24MHz clock - PCB checklist 馃椆 Use recommended pad layout per datasheet. - <https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-210STF>聽 ### XMOS XVF3510 - PCB checklist聽 Datasheets: - <https://www.xmos.com/documents/vocalfusionavs> From page 26-27 of the XMOS VocalFusion XVF3510 datasheet (dated 2019-10-22). 10.1 SCHEMATICS DESIGN CHECK LIST 10.1.1. POWER SUPPLIES 馃椆 The VDD (core) supply ramps monotonically (rises constantly) from 0V to its final value (0.95V - 1.05V) within 10ms (Section 6.1). 馃椆 The VDD (core) supply is capable of supplying 1400mA (Section 6.1). 馃椆 PLL_AVDD is filtered with a low pass filter, for example an RC filter, (Section 6.1) 10.1.2. POWER SUPPLY DECOUPLING 馃椆 The design has multiple decoupling capacitors per supply, for example less than 12 402 or 0603 size surface mount capacitors of 100nF in value, per supply (Section 6.1). 馃椆 A bulk decoupling capacitor of at least 10uF is placed on each supply (Section 6.1). 10.1.3. POWER ON RESET 馃椆 The RST_N pins are asserted (low) until all supplies are good. There is enough time between VDDIO power good and RST_N to allow any boot flash to settle (Section 6.1). 10.1.4. CLOCKS 馃椆 The CLK input pin is supplied with a clock with monotonic rising edges and low jitter. 馃椆 A 24MHz reference clock must be connected to the CLK pin for all implementations. 馃椆 MCLK_INOUT is connected to MCLK_IN via a PCB trace outside the device 馃椆 All clock signals (CLK, MIC_CLK, QSPI_CLK, SPI_CLK, MCLK_IN, MCLK_INOUT, BCLK, LRCLK) and other audio signals