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an299210_AN11562 PN7120 Low Power Mode Configuration_1.0.pdf

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PN7120 implements an extreme low power discovery mode allowing decreasing up to 100 times the current consumption of the NFC Controller. This consumption reduction does not impact the user experience

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AN11562

PN7120 Low Power Mode Configuration

Rev. 1.0 — 15 March 2015

299210

Application note

COMPANY PUBLIC

Document information

Info

Content

Keywords

NFC, PN7120, low power, discovery mode

Abstract

This application notes provides guidance on how PN7120 can be

configured in order to reduce current consumption by using low power

discovery mode

NXP Semiconductors

AN11562

PN7120 Low Power Mode Configuration

Revision history

Rev

Date

Description

1.0

20150315

Approved version for product release

0.1

20141223

Initial version of the document

Application note

COMPANY PUBLIC

Rev. 1.0 — 15 March 2015

299210

2 of 21

Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors

AN11562

PN7120 Low Power Mode Configuration

1. Introduction

PN7120 implements an extreme low power discovery mode allowing decreasing up to

100 times the current consumption of the NFC Controller. This consumption reduction

does not impact the user experience.

This application note depicts how to use and tune this feature.

2. Low Power Discovery Mode concept

PN7120 supports

RF DISCOVERY defined within ACTIVITY specification from NFC

FORUM (see [1]). PN7120 can be configured by following guidance depicted with NFC

specification (see NCI specification [2]).

The discovery loop consist of 2 phases:

- POLL phase where NFCC emits RF field and sense for remote tag or peer NFC

device

- LISTEN phase where NFCC hears for remote reader of peer NFC device

Average NFCC power consumption then depends on:

- Technologies enabled in the POLL phase (lead to about 5ms to 80ms duration)

- LISTEN phase duration

- Antenna system used by the application (impedance of the RF system)

Fig 1. Regular Discovery loop

Application note

COMPANY PUBLIC

Rev. 1.0 — 15 March 2015

299210

3 of 21

NXP Semiconductors

AN11562

PN7120 Low Power Mode Configuration

Fig 2. Oscilloscope screenshot of Regular Polling loop @ 2Hz

Current consumption is one of the main criteria during a NFC design-in within an

embedded equipment. PN7120 NFC controller implements two modes of Low Power

discovery additionally to the regular discovery mode:

- Low Power Tag Detector mode

- Hybrid mode

2.1 Low Power Tag Detector mode

It consists on replacing each POLL phase of the regular discovery loop by a short LPCD

pulse (few us of RF emission), allowing the PN7120 to check any change in the antenna

proximity area. Whenever a change is detected, a regular POLL phase is triggered to

verify the presence of tag or peer NFC device.

The obtained new duty cycle allows achieving an extremely low current consumption.

NXP provides a proprietary extension to the NCI protocol to enable and configure this

mode (refer to PN7120 User Manual [4] for more details).

Application note

COMPANY PUBLIC

Rev. 1.0 — 15 March 2015

299210

4 of 21

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