DSP28335外部 SRAM 访问实验CCS工程

// TI File $Revision: /main/1 $ // Checkin $Date: August 18, 2006 13:46:06 $ //########################################################################### // // FILE: DSP2833x_DefaultIsr.c // // TITLE: DSP2833x Device Default Interrupt Service Routines. // // This file contains shell ISR routines for the 2833x PIE vector table. // Typically these shell ISR routines can be used to populate the entire PIE // vector table during device debug. In this manner if an interrupt is taken // during firmware development, there will always be an ISR to catch it. // // As develpment progresses, these ISR rotuines can be eliminated and replaced // with the user's own ISR routines for each interrupt. Since these shell ISRs // include infinite loops they will typically not be included as-is in the final // production firmware. // //########################################################################### // $TI Release: DSP2833x Header Files V1.01 $ // $Release Date: September 26, 2007 $ //########################################################################### #include "DSP2833x_Device.h" // DSP2833x Headerfile Include File #include "DSP2833x_Examples.h" // DSP2833x Examples Include File // Connected to INT13 of CPU (use MINT13 mask): // Note CPU-Timer1 is reserved for TI use, however XINT13 // ISR can be used by the user. interrupt void INT13_ISR(void) // INT13 or CPU-Timer1 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } // Note CPU-Timer2 is reserved for TI use. interrupt void INT14_ISR(void) // CPU-Timer2 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void DATALOG_ISR(void) // Datalogging interrupt { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void RTOSINT_ISR(void) // RTOS interrupt { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void EMUINT_ISR(void) // Emulation interrupt { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void NMI_ISR(void) // Non-maskable interrupt { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm(" ESTOP0"); for(;;); } interrupt void USER1_ISR(void) // User Defined trap 1 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER2_ISR(void) // User Defined trap 2 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER3_ISR(void) // User Defined trap 3 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER4_ISR(void) // User Defined trap 4 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER5_ISR(void) // User Defined trap 5 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER6_ISR(void) // User Defined trap 6 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER7_ISR(void) // User Defined trap 7 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER8_ISR(void) // User Defined trap 8 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER9_ISR(void) // User Defined trap 9 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER10_ISR(void) // User Defined trap 10 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER11_ISR(void) // User Defined trap 11 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } interrupt void USER12_ISR(void) // User Defined trap 12 { // Insert ISR Code here // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } // ----------------------------------------------------------- // PIE Group 1 - MUXed into CPU INT1 // ----------------------------------------------------------- // INT1.1 interrupt void SEQ1INT_ISR(void) //SEQ1 ADC { // Insert ISR Code here // To receive more interrupts from this PIE group, acknowledge this interrupt // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } // INT1.2 interrupt void SEQ2INT_ISR(void) //SEQ2 ADC { // Insert ISR Code here // To receive more interrupts from this PIE group, acknowledge this interrupt // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm(" ESTOP0"); for(;;); } // INT1.3 - Reserved // INT1.4 interrupt void XINT1_ISR(void) { // Insert ISR Code here // To receive more interrupts from this PIE group, acknowledge this interrupt // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } // INT1.5 interrupt void XINT2_ISR(void) { // Insert ISR Code here // To receive more interrupts from this PIE group, acknowledge this interrupt // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } // INT1.6 interrupt void ADCINT_ISR(void) // ADC { // Insert ISR Code here // To receive more interrupts from this PIE group, acknowledge this interrupt // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Next two lines for debug only to halt the processor here // Remove after inserting ISR Code asm (" ESTOP0"); for(;;); } // INT1.7 interrupt void TINT0_ISR(void) // CPU-Timer 0 { // Insert ISR Code here // To