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Introduction to Digital Design
Using Digilent FPGA Boards
─ Block Diagram / Verilog Examples
Richard E. Haskell
Darrin M. Hanna
Oakland University, Rochester, Michigan
LBE Books
Rochester Hills, MI
ii
Copyright 2009 by LBE Books, LLC. All rights reserved.
ISBN 978-0-9801337-9-0
Online Version
Published by LBE Books, LLC
1202 Walton Boulevard
Suite 214
Rochester Hills, MI 48307
www.lbebooks.com
iii
Preface
A major revolution in digital design has taken place over the past decade.
Field programmable gate arrays (FPGAs) can now contain over a million equivalent
logic gates and tens of thousands of flip-flops. This means that it is not possible to
use traditional methods of logic design involving the drawing of logic diagrams
when the digital circuit may contain thousands of gates. The reality is that today
digital systems are designed by writing software in the form of hardware
description languages (HDLs). The most common HDLs used today are VHDL and
Verilog. Both are in widespread use. When using these hardware description
languages the designer typically describes the behavior of the logic circuit rather
than writing traditional Boolean logic equations. Computer-aided design tools are
used to both simulate the Verilog or VHDL design and to synthesize the design to
actual hardware.
This book assumes no previous knowledge of digital design. We use 30
examples to show you how to get started designing digital circuits that you can
implement on a Xilinx Spartan3E FPGA using either the Digilent BASYS™ system
board that can be purchased from www.digilentinc.com for $59 or the Digilent
Nexys-2 board that costs $99. We will use Active-HDL from Aldec to design,
simulate, synthesize, and implement our digital designs. A free student edition of
Active-HDL is available from Aldec, Inc. (www.aldec.com). To synthesize your
designs to a Spartan3E FPGA you will need to download the free ISE WebPACK
from Xilinx, Inc. (www.xilinx.com). The Xilinx synthesis tools are called from
within the Aldec Active-HDL integrated GUI. We will use the ExPort utility to
download your synthesized design to the Spartan3E FPGA. ExPort is part of the
Adept software suite that you can download free from Digilent, Inc.
(www.digilentinc.com). A more complete book called Digital Design Using
Digilent FPGA Boards – Verilog / Active-HDL Edition is also available from
Digilent or LBE Books (www.lbebooks.com). This more comprehensive book
contains over 75 examples including examples of using the VGA and PS/2 ports.
Similar books that use VHDL are also available from Digilent or LBE Books.
Many colleagues and students have influenced the development of this
book. Their stimulating discussions, probing questions, and critical comments are
greatly appreciated.
Richard E. Haskell
Darrin M. Hanna
iv
Introduction to Digital Design
Using Digilent FPGA Boards
─ Block Diagram / Verilog Examples
Table of Contents
Introduction – Digital Design Using FPGAs 1
Example 1 – Switches and LEDs 6
Example 2 – 2-Input Gates 11
Example 3 – Multiple-Input Gates 15
Example 4 – Equality Detector 20
Example 5 – 2-to-1 Multiplexer 22
Example 6 – Quad 2-to-1 Multiplexer 25
Example 7 – 4-to-1 Multiplexer 30
Example 8 – Clocks and Counters 37
Example 9 – 7-Segment Decoder 42
Example 10 – 7-Segment Displays: x7seg and x7segb 47
Example 11 – 2's Complement 4-Bit Saturator 55
Example 12 – Full Adder 60
Example 13 – 4-Bit Adder 65
Example 14 – N-Bit Adder 68
Example 15 – N-Bit Comparator 70
Example 16 – Edge-Triggered D Flip-Flop Available only in print vesion
Example 17 – D Flip-Flops in Verilog
Example 18 – Divide-by-2 Counter
Example 19 – Registers
Example 20 – N-Bit Register in Verilog
Example 21 – Shift Registers
Example 22 – Ring Counters
Example 23 – Johnson Counters
Example 24 – Debounce Pushbuttons
Example 25 – Clock Pulse
Example 26 – Arbitrary Waveform
Example 27 – Pulse-Width Modulation (PWM)
Example 28 – Controlling Position of a Servo
Example 29 – Scrolling the 7-Segment Display
Example 30 – Fibonacci Sequence
v
Appendix A – Aldec Active-HDL Tutorial 109
Part 1: Project Setup 109
Part 2: Design Entry – sw2led.bde 113
Part 3: Synthesis and Implementation 116
Part 4: Program FPGA Board 120
Part 5: Design Entry – gates2.bde 122
Part 6: Simulation 128
Part 7: Design Entry – HDE 132
Part 8: Simulation – gates2 135
Appendix B – Number Systems Available only in print vesion
B.1 Counting in Binary and Hexadecimal
B.2 Positional Notation
B.3 Fractional Numbers
B.4 Number System Conversions
B.5 Negative Numbers
Appendix C – Basic Logic Gates
C.1 Truth Tables and Logic Equations
C.2 Positive and Negative Logic: De Morgan’s Theorem
C.3 Sum of Products Design
C.4 Product of Sums Design
Appendix D – Boolean Algebra and Logic Equations
D.1 Boolean Theorems
D.2 Karnaugh Maps
Appendix E – Verilog Quick Reference Guide 175
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