***************************************************************************************
* PROJECT ARCHIVE SUMMARY REPORT
*
* (archive_project_summary.txt)
*
* PLEASE READ THIS REPORT TO GET THE DETAILED INFORMATION ABOUT THE PROJECT DATA THAT
* WAS ARCHIVED FOR THE CURRENT PROJECT
*
* The report is divided into following four sections:-
*
* Section (1) - PROJECT INFORMATION
* This section provides the details of the current project that was archived
*
* Section (2) - INCLUDED/EXCLUDED RUNS
* This section summarizes the list of design runs for which the results were included
* or excluded from the archive
*
* Section (3) - ARCHIVED SOURCES
* This section summarizes the list of files that were added to the archive
*
* Section (3.1) - INCLUDE FILES
* This section summarizes the list of 'include' files that were added to the archive
*
* Section (3.1.1) - INCLUDE_DIRS SETTINGS
* This section summarizes the 'verilog include directory' path settings, if any
*
* Section (3.2) - REMOTE SOURCES
* This section summarizes the list of referenced 'remote' files that were 'imported'
* into the archived project
*
* Section (3.3) - SOURCES SUMMARY
* This section summarizes the list of all the files present in the archive
*
* Section (3.4) - REMOTE IP DEFINITIONS
* This section summarizes the list of all the remote IP's present in the archive
*
* Section (4) - JOURNAL/LOG FILES
* This section summarizes the list of journal/log files that were added to the archive
*
* Section (5) - CONFIGURATION SETTINGS/FILES
* This section summarizes the configuration settings/files that were added to the archive
*
***************************************************************************************
Section (1) - PROJECT INFORMATION
---------------------------------
Name = pcie_7x_0_example
Directory = C:/Work_projects/pcie_7x_0_example
Section (2) - INCLUDED RUNS
---------------------------
The run results were included for the following runs in the archived project:-
<synth_1>
<impl_1>
Section (3) - ARCHIVED SOURCES
------------------------------
The following sub-sections describes the list of sources that were archived for the current project:-
Section (3.1) - INCLUDE FILES
-----------------------------
List of referenced 'RTL Include' files that were 'imported' into the archived project:-
None
Section (3.1.1) - INCLUDE_DIRS SETTINGS
---------------------------------------
List of the "INCLUDE_DIRS" fileset property settings that may or may not be applicable in the archived
project, since most the 'RTL Include' files referenced in the original project were 'imported' into the
archived project.
<sources_1> fileset RTL include directory paths (INCLUDE_DIRS):-
None
<sim_1> fileset RTL include directory paths (INCLUDE_DIRS):-
None
Section (3.2) - REMOTE SOURCES
------------------------------
List of referenced 'remote' design files that were 'imported' into the archived project:-
<sources_1>
None
<constrs_1>
None
<sim_1>
None
Section (3.3) - SOURCES SUMMARY
-------------------------------
List of all the source files present in the archived project:-
<sources_1>
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_128.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_INTR_CTRL.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_EP_MEM.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_GEN2.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_128_TX_ENGINE.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_128_RX_ENGINE.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_RD_THROTTLE.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_EP_MEM_ACCESS.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_CFG_CTRL.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_TO_CTRL.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/axi_trn_rx.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/axi_trn_tx.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD_EP.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/BMD.v
./pcie_7x_0_example.srcs/sources_1/imports/pcie_7x_0/bmd/axi_trn_top.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/pcie_7x_0.xci
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/doc/pcie_7x_v3_0_changelog.txt
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/pcie_7x_0.veo
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pipe_clock.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pipe_eq.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pipe_drp.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pipe_rate.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pipe_reset.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pipe_sync.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gtp_pipe_rate.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gtp_pipe_drp.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gtp_pipe_reset.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pipe_user.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pipe_wrapper.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_qpll_drp.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_qpll_reset.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_qpll_wrapper.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_rxeq_scan.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie_top.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_core_top.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_axi_basic_rx_null_gen.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_axi_basic_rx_pipeline.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_axi_basic_rx.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_axi_basic_top.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_axi_basic_tx_pipeline.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_axi_basic_tx_thrtl_ctl.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_axi_basic_tx.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie_7x.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie_bram_7x.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie_bram_top_7x.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie_brams_7x.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie_pipe_lane.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie_pipe_misc.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie_pipe_pipeline.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gt_top.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gt_common.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gtp_cpllpd_ovrd.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gtx_cpllpd_ovrd.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gt_rx_valid_filter_7x.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_gt_wrapper.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0_pcie2_top.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/sim/pcie_7x_0.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/source/pcie_7x_0-PCIE_X0Y0.xdc
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/synth/pcie_7x_0_ooc.xdc
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/synth/pcie_7x_0.v
./pcie_7x_0_example.srcs/sources_1/ip/pcie_7x_0/pcie_7x_0.dcp
./pcie_7x_0_exa
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代码 xapp1052 参考pdf学习
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v:94个
h:17个
rst:16个
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代码 xapp1052 参考pdf学习 (322个子文件)
DriverMgr.aps 33KB
DriverMgr_.aps 19KB
runme.bat 229B
runme.bat 229B
MSG00001.bin 32B
xilinx_pcie_2_1_ep_7x.bit 10.91MB
s3_1000.c 76KB
pnp.c 44KB
DriverMgr_p.c 30KB
xbmd.c 28KB
DriverMgr_i.c 1KB
dlldata.c 839B
PCIe_Perf.CAB 1.66MB
cleanup 2KB
DriverMgr.clw 469B
build.cmd 28B
xbmd_main.cpp 59KB
bmd.cpp 44KB
s3_1000.cpp 35KB
run_xbmd.cpp 19KB
cfg.cpp 17KB
DriverMgr.cpp 4KB
read_cfg.cpp 3KB
xbmd_ep.cpp 387B
StdAfx.cpp 315B
run_bmd.csh 122B
xilinx_pcie_2_1_ep_7x_routed.dcp 2.79MB
xilinx_pcie_2_1_ep_7x_placed.dcp 1.93MB
xilinx_pcie_2_1_ep_7x_opt.dcp 1.03MB
pcie_7x_0.dcp 1MB
xilinx_pcie_2_1_ep_7x.dcp 250KB
DriverMgrps.def 251B
DriverMgr.def 226B
DriverMgr.dep 183B
DriverMgr.dll 188KB
DriverMgr2.dll 88KB
DriverMgr2_v1.dll 64KB
DriverMgr.dsp 12KB
DriverMgr.dsw 647B
setup.exe 138KB
PCIe_Perf.exe 64KB
DriverMgr2.exp 1KB
DriverMgr.exp 1023B
Main.frm 40KB
xbmd_app.glade 55KB
DriverMgr.h 24KB
ioctrl.h 10KB
ioctrl.h 10KB
MersenneTwister.h 10KB
s3_1000.h 7KB
xbmd_descriptors.h 6KB
s3_1000.h 6KB
bmd.h 5KB
xbmd_main.h 5KB
cfg.h 4KB
xbmd.h 3KB
xbmd_ep.h 2KB
msglog.h 2KB
DriverMgrCP.h 1KB
StdAfx.h 953B
resource.h 502B
resource.h 411B
usage_statistics_webtalk.html 40KB
vc60.idb 233KB
vc60.idb 49KB
DriverMgr.idl 3KB
DriverMgr.ilk 310KB
makefile.inc 63B
oemsetupXP.inf 874B
vivado.jou 2KB
vivado.jou 557B
vivado.jou 550B
ISEWrap.js 5KB
ISEWrap.js 5KB
rundef.js 1KB
rundef.js 1KB
DriverMgr2.lib 2KB
DriverMgr.lib 2KB
load_driver 38B
runme.log 71KB
runme.log 28KB
vivado.log 5KB
SETUP.LST 4KB
DriverMgr.mak 18KB
Makefile 638B
Makefile 360B
MsgLog.mc 2KB
DriverMgrps.mk 478B
DriverMgr.ncb 145KB
DriverMgr.obj 294KB
StdAfx.obj 114KB
s3_1000.obj 113KB
DriverMgr.obj 89KB
s3_1000.obj 48KB
StdAfx.obj 5KB
DriverMgr.opt 53KB
vivado.pb 107KB
place_design.pb 19KB
route_design.pb 12KB
opt_design.pb 7KB
共 322 条
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