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Hp Compaq Presario C700 (Compal IBL80 LA-3732P) Laptop.pdf
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Hp Compaq Presario C700 (Compal IBL80 LA-3732P) Laptop.pdf
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Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-3732P
0.2
Cover Sheet
Custom
140Wednesday, March 14, 2007
2006/02/13 2006/07/26
Compal Electronics, Inc.
REV:0.1
Mobile Merom uFCPGA with Satna Rosa Platform
Schematics Document
2007-01-08
Compal confidential
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-3732P
0.2
Block Diagram
Custom
240Wednesday, March 14, 2007
2006/02/13 2006/07/26
Compal Electronics, Inc.
Power On/Off CKT.
LPC BUS
page 22
H_A#(3..31)
page 27
BANK 0, 1, 2, 3
USB Conn
533/667/800MHz
DMI
DC/DC Interface CKT.
Mobile Yonah/Merom
USB2.0
FSB
Clock Generator
ICS9LPRS355
Power Circuit DC/DC
IDE ODD Connector
uFCPGA-478 CPU
page 28
DDR2-SO-DIMM X2
page 31
page 4page 4,5,6
RTC CKT.
page 15
DDR2 -400/533/667
page 4
page 7,8,9,10,11,12
SB ICH8
Thermal Sensor
ADM1032AR
page 13,14
page 18,19,20,21
page 19
Fan Control
Dual Channel
Touch Pad CONN.
Int.KBD
ENE KB926
page 30
page 30page 28
Page 32,33,34,35,36,37,38
PCI-E BUS
page 28
LED
SPI
25LF080A
SPI ROM
page 29
H_D#(0..63)
Spartan 1.0 (Merom +Crestline+ICH8)
AC-LINK/Azalia
page 22
SATA HDD Connector
PATA Master
page 22
Mini-Card
WLAN
NB Crestline
SATA
page 24
CX20549-12
Audio Conexant
page 25
MODEM AMOM
page 26
AMP & Audio Jack
TPA6017A2
CX20548
page 16
page 17
LVDS Conn
page 23
page 23
RTL8100CL
RJ45/11 CONN
Realtac
CRT/TV-OUT
PCI BUS
File Name : LA-3732P
Compal confidential
Socket P
ZZZ1
PC B
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-3732P
0.2
Notes List
340Wednesday, March 14, 2007
2006/02/13 2006/07/26
Compal Electronics, Inc.
1 0 1 0 0 1 0 0A4
I2C / SMBUS ADDRESSING
1 0 1 0 0 0 0 0
D2
A0
CLOCK GENERATOR (EXT.)
HEX
DDR SO-DIMM 1
ADDRESS
DDR SO-DIMM 0
1 1 0 1 0 0 1 0
DEVICE
Symbol Note :
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build
DEBUG@ : means just reserve for debug.
SERIAL SENSOR
(CPU)
SMB_EC_CK2
SOURCE
KB925
INVERTER BATT EEPROM
THERMAL
SODIMM CLK CHIP
SMBUS Control Table
SMB_CK_CLK1
SMB_CK_DAT1 ICH8
MINI CARD
SMB_EC_DA2
SMB_EC_CK1
SMB_EC_DA1
KB925
LCD_CLK
LCD_DAT
Crestline
LCD
ADM1032
X
X
X
XX
X
XX
X
XX
X
XX
X
XX
X
X
X
X
XX
X
X
VV
V
External PCI Devices
IDSEL # PIRQREQ/GNT #DEVICE
LAN AD22 0 A
O
O
X
+0.9V
Voltage Rails
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+1.25VS
+CPU_CORE
OO
OO
X
XX
+VCCP
power
plane
O
O
O
O
O
X
S5 S4/ Battery only
XX X
+B
State
+1.5VS
+1.8V
S5 S4/AC & Battery
don't exist
S5 S4/AC
+5VALW
S0
O
O
BOM: 43XXXXXX
Jump-Short: PJP?
VVV
V
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_PROCHOT# OCP#
XDP_BPM#3
XDP_BPM#2
XDP_DBRESET#_R
XDP_BPM#1
XDP_BPM#0
XDP_PRE
XDP_DBRESET#XDP_DBRESET#_R
XDP_TCK
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_TCK
XDP_TDO
XDP_TRST#
XDP_TMS
XDP_TDI
XDP_TDO
H_RESET#H_RESET#_R
CLK_CPU_XDP
CLK_CPU_XDP#
XDP_BPM#4
XDP_BPM#5
XDP_BPM#5
XDP_HOOK1
XDP_HOOK1
H_PWRGOOD_R
H_REQ#2
H_DBSY#
H_ADS#H_A#3
H_A#22
H_A#19
XDP_TRST#
H_REQ#4
H_ADSTB#0
H_A#18
H_TRDY#H_REQ#3
H_INTR
H_HITM#
H_A#6
H_A#26
H_FERR#
H_DRDY#
CLK_CPU_BCLK
CLK_CPU_BCLK#
H_A#4
H_A#23
H_A#32
H_BR0#
XDP_BPM#1
H_A#7
H_A#13
H_THERMDC
XDP_TCK
H_RS#1
H_LOCK#
H_A#5
H_A#25
H_A#21
H_A#10
H_A#34
H_NMI
H_DEFER#
H_REQ#0
XDP_DBRESET#
H_BPRI#
H_ADSTB#1
H_A#9
H_A#31
H_A#35
XDP_BPM#2
XDP_TMS
XDP_BPM#5
XDP_BPM#4
H_INIT#
H_A#30
H_A#24
H_A#16
H_A#11
H_RS#2
H_IGNNE#
XDP_BPM#0
H_REQ#1
H_A#8
H_A#28
H_STPCLK#
H_SMI#
XDP_BPM#3
XDP_TDO
XDP_TDI
H_A#27
H_A#20
H_A#15
H_THERMTRIP#
H_RS#0
H_HIT#
H_BNR#
H_A20M#
H_A#17
H_A#12
H_A#33
H_THERMDA
H_A#29
H_A#14
H_IERR#
H_THERMDA_R
H_THERMDC_R
SMB_EC_DA2
SMB_EC_CK2
H_THERMDA
H_THERMDC
THERM#
SMB_EC_CK2
SMB_EC_DA2
THERM#
FAN
H_RESET#
H_PROCHOT#
OCP# <20>
H_A#[3..16]<7>
H_ADSTB#0<7>
H_REQ#0<7>
H_REQ#1<7>
H_REQ#2<7>
H_REQ#4<7>
H_A#[17..35]<7>
H_ADSTB#1<7>
H_A20M#<19>
H_FERR#<19>
H_IGNNE#<19>
H_STPCLK#<19>
H_INTR<19>
H_NMI<19>
H_SMI#<19>
H_ADS# <7>
H_BNR# <7>
H_BPRI# <7>
H_BR0# <7>
H_THERMTRIP# <7,19>
CLK_CPU_BCLK <15>
CLK_CPU_BCLK# <15>
H_RESET# <7>
H_RS#0 <7>
H_RS#1 <7>
H_RS#2 <7>
H_TRDY# <7>
H_DEFER# <7>
H_DRDY# <7>
H_DBSY# <7>
H_INIT# <19>
H_LOCK# <7>
H_HIT# <7>
H_HITM# <7>
XDP_DBRESET# <20>
CLK_CPU_XDP <15>
CLK_CPU_XDP# <15>
H_REQ#3<7>
H_PWRGOOD_R<5>
SMB_EC_CK2<30>
SMB_EC_DA2<30>
FAN_PWM<30>
H_PROCHOT# <37>
+VCCP
+VCCP
+3VS
+VCCP +VCCP
+VCCP
+VCCP
+3VS
+3VS
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-3732P
0.2
Merom(1/3)-AGTL+/XDP
Custom
440Wednesday, March 14, 2007
2006/02/13 2006/03/10
Compal Electronics, Inc.
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
XDP Connector
Place R9 within 200ps (~1") to CPU
layout note: Change R7 to 649 ohm if using XTP to ITP adapter
For Merom, R14 and R15 are 0ohm
For Penryn, R14 and R15 are 100ohm.
Thermal Sensor ADM1032ARMZ
PWM Fan Control circuit
Address:100_1100
SP02000D000 S W-CONN ACES 85204-02001 2P P1.25
ACES_85204-02001_2P
SP07000FP00 S SOCKET TYCO 2-1871873-2 478P H3 CPU
SP07000FD00 S SOCKET FOXCONN PZ4782A-274M-41 478P H3
0306_Reserve.
ADDR GROUP 0 ADDR GROUP 1
CONTROL
XDP/ITP SIGNALS
H CLK
THERMAL
RESERVED
ICH
JP2A
Merom Ball-out Rev 1a
CONN@
A[10]#
N3
A[11]#
P5
A[12]#
P2
A[13]#
L2
A[14]#
P4
A[15]#
P1
A[16]#
R1
A[17]#
Y2
A[18]#
U5
A[19]#
R3
A[20]#
W6
A[21]#
U4
A[22]#
Y5
A[23]#
U1
A[24]#
R4
A[25]#
T5
A[26]#
T3
A[27]#
W2
A[28]#
W5
A[29]#
Y4
A[3]#
J4
A[30]#
U2
A[31]#
V4
RSVD[01]
M4
RSVD[02]
N5
RSVD[03]
T2
RSVD[04]
V3
RSVD[05]
B2
RSVD[06]
C3
RSVD[07]
D2
RSVD[08]
D22
A[4]#
L5
A[5]#
L4
A[6]#
K5
A[7]#
M3
A[8]#
N2
A[9]#
J1
A20M#
A6
ADS#
H1
ADSTB[0]#
M1
ADSTB[1]#
V1
RSVD[09]
D3
BCLK[0]
A22
BCLK[1]
A21
BNR#
E2
BPM[0]#
AD4
BPM[1]#
AD3
BPM[2]#
AD1
BPM[3]#
AC4
BPRI#
G5
BR0#
F1
DBR#
C20
DBSY#
E1
DEFER#
H5
DRDY#
F21
FERR#
A5
HIT#
G6
HITM#
E4
IERR#
D20
IGNNE#
C4
INIT#
B3
LINT0
C6
LINT1
B4
LOCK#
H4
PRDY#
AC2
PREQ#
AC1
PROCHOT#
D21
REQ[0]#
K3
REQ[1]#
H2
REQ[2]#
K2
REQ[3]#
J3
REQ[4]#
L1
RESET#
C1
RS[0]#
F3
RS[1]#
F4
RS[2]#
G3
SMI#
A3
STPCLK#
D5
TCK
AC5
TDI
AA6
TDO
AB3
THERMTRIP#
C7
THERMDA
A24
THERMDC
B25
TMS
AB5
TRDY#
G2
TRST#
AB6
A[32]#
W3
A[33]#
AA4
A[34]#
AB2
A[35]#
AA3
RSVD[10]
F6
R10
56_0402_5%
12
R3 54.9_0402_1%
1 2
R15 0_0402_5%
1 2
R9
1K_0402_1%
1 2
R16
10K_0402_5%
1 2
C6
0.1U_0402_16V4Z
1
2
C2 0.1U_0402_16V4Z
1 2
R12 0_0402_5%
1 2
C1
0.1U_0402_16V4Z
1
2
U2
TC7SH00FU_SSOP5
INB
1
INA
2
O
4
G
3
P
5
JP1
SAMTE_BSH-030-01-L-D-A@
GND0
1
OBSFN_A0
3
OBSFN_A1
5
GND2
7
OBSDATA_A0
9
OBSDATA_A1
11
GND4
13
OBSDATA_A2
15
OBSDATA_A3
17
GND6
19
OBSFN_B0
21
OBSFN_B1
23
GND8
25
OBSDATA_B0
27
OBSDATA_B1
29
GND10
31
OBSDATA_B2
33
OBSDATA_B3
35
GND12
37
PWRGOOD/HOOK0
39
HOOK1
41
VCC_OBS_AB
43
HOOK2
45
HOOK3
47
GND14
49
SDA
51
SCL
53
TCK1
55
TCK0
57
GND16
59
GND1
2
OBSFN_C0
4
OBSFN_C1
6
GND3
8
OBSDATA_C0
10
OBSDATA_C1
12
GND5
14
OBSDATA_C2
16
OBSDATA_C3
18
GND7
20
OBSFN_D0
22
OBSFN_D1
24
GND9
26
OBSDATA_D0
28
OBSDATA_D1
30
GND11
32
OBSDATA_D2
34
OBSDATA_D3
36
GND13
38
ITPCLK/HOOK4
40
ITPCLK#/HOOK5
42
VCC_OBS_CD
44
RESET#/HOOK6
46
DBR#/HOOK7
48
GND15
50
TD0
52
TRST#
54
TDI
56
TMS
58
GND17
60
C3
0.1U_0402_16V4Z
1
2
S
G
D
Q1
SI3456BDV-T1-E3_TSOP6
3
6
2
4 5
1
C4
2200P_0402_50V7K
1 2
U1
ADM1032ARMZ-2REEL_MSOP8
VDD
1
ALERT#
6
THERM#
4
GND
5
D+
2
D-
3
SCLK
8
SDATA
7
E
B
C
Q2
MMBT3904_SOT23
@
2
3 1
R17
56_0402_5%@
12
D26
RLZ5.1B_LL34
@
12
D1
RB751V_SOD323
2 1
R14 0_0402_5%
1 2
R405 0_0402_5%@
1 2
R4 54.9_0402_1%
1 2
R2 54.9_0402_1%
1 2
R8 54.9_0402_1%
1 2
C5
4.7U_0805_10V4Z
1
2
R13
68_0402_5%
12
R1
1K_0402_5%@
1 2
R5 54.9_0402_1%
1 2
R7 51_0402_1%
1 2
R11
200_0402_1%
12
JP3
ACES_85204-02001
CONN@
1
1
2
2
G1
3
G2
4
R6 54.9_0402_1%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V_CPU_GTLREF
H_D#4
H_D#14
H_D#10
H_D#9
H_D#3
H_D#13
H_D#6
H_D#2
H_D#8
H_D#12
H_D#1
H_D#5
H_D#7
H_D#11
H_D#0
H_D#15
H_D#27
H_D#25
H_D#31
H_D#24
H_D#20
H_D#30
H_D#23
H_D#19
H_D#29
H_D#16
H_D#18
H_D#22
H_D#26
H_D#28
H_D#17
H_D#21
H_DINV#0
H_DINV#1 H_DINV#3
H_DINV#2
H_DSTBN#2
H_DSTBP#2
H_DSTBP#1
H_DSTBN#1
H_DSTBP#0
H_DSTBN#0
H_DSTBN#3
H_DSTBP#3
H_D#48
H_D#56
H_D#52
H_D#59
H_D#63
H_D#55
H_D#51
H_D#62
H_D#58
H_D#54
H_D#50
H_D#57
H_D#61
H_D#53
H_D#49
H_D#60
COMP0
COMP2
COMP3
COMP1
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0 H_PWRGOOD
H_CPUSLP#
H_DPSLP#
H_DPRSTP#
H_PSI#
V_CPU_GTLREF
TEST1
TEST2
VSSSENSE
VCCSENSE
H_DPWR#
H_D#47
H_D#43
H_D#42
H_D#37
H_D#34
H_D#33
H_D#39
H_D#38
H_D#41
H_D#40
H_D#35
H_D#36
H_D#45
H_D#44
H_D#32
H_D#46
TEST3
TEST5
TEST6
TEST4
H_PWRGOOD_R
VSSSENSE
VCCSENSE
VCCSENSE <37>
VSSSENSE <37>
H_D#[0..15]<7>
H_DSTBN#0<7>
H_DSTBP#0<7>
H_DINV#0<7>
H_D#[16..31]<7>
H_DSTBN#1<7>
H_DSTBP#1<7>
H_DINV#1<7>
CPU_BSEL0<15>
CPU_BSEL1<15>
CPU_BSEL2<15>
H_D#[32..47] <7>
H_DSTBN#2 <7>
H_DSTBP#2 <7>
H_DINV#2 <7>
H_D#[48..63] <7>
H_DSTBN#3 <7>
H_DSTBP#3 <7>
H_DINV#3 <7>
H_DPRSTP# <7,19,37>
H_DPSLP# <19>
H_CPUSLP# <7>
H_DPWR# <7>
H_PWRGOOD <19>
H_PSI# <37>
CPU_VID0 <37>
CPU_VID1 <37>
CPU_VID2 <37>
CPU_VID3 <37>
CPU_VID4 <37>
CPU_VID5 <37>
CPU_VID6 <37>
H_PWRGOOD_R <4>
+VCCP
+VCCP
+1.5VS
+VCC_CORE +VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-3732P
0.2
Merom(2/3)-AGTL+/PWR
Custom
540Wednesday, March 14, 2007
2006/02/13 2006/03/10
Compal Electronics, Inc.
Close to CPU pin AD26
within 500mils.
CPU_BSEL CPU_BSEL2 CPU_BSEL1
166
200
01
0
1
CPU_BSEL0
1
0
Resistor placed within
0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils.
Length match within 25 mils.
The trace width/space/other is
20/7/25.
Close to CPU pin
within 500mils.
Near pin B26
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
R18 0_0402_5%
12
C8 0.1U_0402_16V4Z@
1 2
JP2C
Merom Ball-out Rev 1a
.
CONN@
VCC[001]
A7
VCC[002]
A9
VCC[003]
A10
VCC[004]
A12
VCC[005]
A13
VCC[006]
A15
VCC[007]
A17
VCC[008]
A18
VCC[009]
A20
VCC[010]
B7
VCC[011]
B9
VCC[012]
B10
VCC[013]
B12
VCC[014]
B14
VCC[015]
B15
VCC[016]
B17
VCC[017]
B18
VCC[018]
B20
VCC[019]
C9
VCC[020]
C10
VCC[021]
C12
VCC[022]
C13
VCC[023]
C15
VCC[024]
C17
VCC[025]
C18
VCC[026]
D9
VCC[027]
D10
VCC[028]
D12
VCC[029]
D14
VCC[030]
D15
VCC[031]
D17
VCC[032]
D18
VCC[033]
E7
VCC[034]
E9
VCC[035]
E10
VCC[036]
E12
VCC[037]
E13
VCC[038]
E15
VCC[039]
E17
VCC[040]
E18
VCC[041]
E20
VCC[042]
F7
VCC[043]
F9
VCC[044]
F10
VCC[045]
F12
VCC[046]
F14
VCC[047]
F15
VCC[048]
F17
VCC[049]
F18
VCC[050]
F20
VCC[051]
AA7
VCC[052]
AA9
VCC[053]
AA10
VCC[054]
AA12
VCC[055]
AA13
VCC[056]
AA15
VCC[057]
AA17
VCC[058]
AA18
VCC[059]
AA20
VCC[060]
AB9
VCC[061]
AC10
VCC[062]
AB10
VCC[063]
AB12
VCC[064]
AB14
VCC[065]
AB15
VCC[066]
AB17
VCC[067]
AB18
VCC[068]
AB20
VCC[069]
AB7
VCC[070]
AC7
VCC[071]
AC9
VCC[072]
AC12
VCC[073]
AC13
VCC[074]
AC15
VCC[075]
AC17
VCC[076]
AC18
VCC[077]
AD7
VCC[078]
AD9
VCC[079]
AD10
VCC[080]
AD12
VCC[081]
AD14
VCC[082]
AD15
VCC[083]
AD17
VCC[084]
AD18
VCC[085]
AE9
VCC[086]
AE10
VCC[087]
AE12
VCC[088]
AE13
VCC[089]
AE15
VCC[090]
AE17
VCC[091]
AE18
VCC[092]
AE20
VCC[093]
AF9
VCC[094]
AF10
VCC[095]
AF12
VCC[096]
AF14
VCC[097]
AF15
VCC[098]
AF17
VCC[099]
AF18
VCC[100]
AF20
VCCA[01]
B26
VCCP[03]
J6
VCCP[04]
K6
VCCP[05]
M6
VCCP[06]
J21
VCCP[07]
K21
VCCP[08]
M21
VCCP[09]
N21
VCCP[10]
N6
VCCP[11]
R21
VCCP[12]
R6
VCCP[13]
T21
VCCP[14]
T6
VCCP[15]
V21
VCCP[16]
W21
VCCSENSE
AF7
VID[0]
AD6
VID[1]
AF5
VID[2]
AE5
VID[3]
AF4
VID[4]
AE3
VID[5]
AF3
VID[6]
AE2
VSSSENSE
AE7
VCCA[02]
C26
VCCP[01]
G21
VCCP[02]
V6
R25
27.4_0402_1%
12
C9
10U_0805_6.3V6M
1
2
R24
54.9_0402_1%
12
R22
54.9_0402_1%
12
R26
1K_0402_5%
12
R23
27.4_0402_1%
12
R20 1K_0402_5%@
1 2
R21 1K_0402_5%@
1 2
C10
0.01U_0402_16V7K
1
2
R29
2K_0402_1%
12
T1
R19 0_0402_5%
12
R28
100_0402_1%
1 2
DATA GRP 0
DATA GRP 1
DATA GRP 2DATA GRP 3
MISC
JP2B
Merom Ball-out Rev 1a
CONN@
COMP[0]
R26
COMP[1]
U26
COMP[2]
AA1
COMP[3]
Y1
D[0]#
E22
D[1]#
F24
D[10]#
J24
D[11]#
J23
D[12]#
H22
D[13]#
F26
D[14]#
K22
D[15]#
H23
D[16]#
N22
D[17]#
K25
D[18]#
P26
D[19]#
R23
D[2]#
E26
D[20]#
L23
D[21]#
M24
D[22]#
L22
D[23]#
M23
D[24]#
P25
D[25]#
P23
D[26]#
P22
D[27]#
T24
D[28]#
R24
D[29]#
L25
D[3]#
G22
D[30]#
T25
D[31]#
N25
D[32]#
Y22
D[33]#
AB24
D[34]#
V24
D[35]#
V26
D[36]#
V23
D[37]#
T22
D[38]#
U25
D[39]#
U23
D[4]#
F23
D[40]#
Y25
D[41]#
W22
D[42]#
Y23
D[43]#
W24
D[44]#
W25
D[45]#
AA23
D[46]#
AA24
D[47]#
AB25
D[48]#
AE24
D[49]#
AD24
D[5]#
G25
D[50]#
AA21
D[51]#
AB22
D[52]#
AB21
D[53]#
AC26
D[54]#
AD20
D[55]#
AE22
D[56]#
AF23
D[57]#
AC25
D[58]#
AE21
D[59]#
AD21
D[6]#
E25
D[60]#
AC22
D[61]#
AD23
D[62]#
AF22
D[63]#
AC23
D[7]#
E23
D[8]#
K24
D[9]#
G24
TEST5
AF1
DINV[0]#
H25
DINV[1]#
N24
DINV[2]#
U22
DINV[3]#
AC20
DPRSTP#
E5
DPSLP#
B5
DPWR#
D24
DSTBN[0]#
J26
DSTBN[1]#
L26
DSTBN[2]#
Y26
DSTBN[3]#
AE25
DSTBP[0]#
H26
DSTBP[1]#
M26
DSTBP[2]#
AA26
DSTBP[3]#
AF24
GTLREF
AD26
PSI#
AE6
PWRGOOD
D6
SLP#
D7
TEST3
C24
BSEL[0]
B22
BSEL[1]
B23
BSEL[2]
C21
TEST2
D25
TEST4
AF26
TEST6
A26
TEST1
C23
+
C7
330U_4V_M
1
2
T3
R27
1K_0402_1%
12
T2
R30
100_0402_1%
1 2
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