Solutions for Chapter 6 Exercises
1
Solutions for Chapter 6 Exercises
6.1
a. Shortening the ALU operation will not affect the speedup obtained from
pipelining. It would not affect the clock cycle.
b. If the ALU operation takes 25% more time, it becomes the bottleneck in the
pipeline. The clock cycle needs to be 250 ps. The speedup would be 20%
less.
6.2
a. It takes 100 ps * 10
6
instructions = 100 microseconds to execute on a non-
pipelined processor (ignoring start and end transients in the pipeline).
b. A perfect 20-stage pipeline would speed up the execution by 20 times.
c. Pipeline overhead impacts both latency and throughput.
6.3
See the following figure:
6.4
There is a data dependency through
$3
between the first instruction and each
subsequent instruction. There is a data dependency through
$6
between the
lw
in-
struction and the last instruction. For a five-stage pipeline as shown in Figure 6.7,
the data dependencies between the first instruction and each subsequent instruc-
tion can be resolved by using forwarding.
The data dependency between the load and the last add instruction cannot be
resolved by using forwarding.
add $3, $4, $6
sub $5, $3, $2
lw $7, 100($5)
add $8, $7, $2
Program
execution
order
(in instructions)
IF ID WBEX
IF
IF
ID
ID
MEM
MEM
EX
EX
Time
2 4 6 8 10 12 14 16
IF ID
MEM
WB
MEM
WB
WB
EX
MEM
MEM
bubble bubble bubble bubble bubble
