ILI9488
a-Si TFT LCD Single Chip Driver
320(RGB) x 480 Resolution, 16.7M-color
With Internal GRAM
Specification
Preliminary
Version: V090
Document No: ILI9488_IDT_V090_20121019.pdf
ILI TECHNOLOGY CORP.
8F, No. 38, Taiyuan St, Jhubei City,
Taiwan 302, R.O.C.
Tel.886-3-5600099; Fax.886-3-5600585
http://www.ilitek.com
a-Si TFT LCD Single Chip Driver
320RGB x 480 Resolution and 16.7M-color
ILI9488
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 2 of 339 Version: 001
Table of Contents
1.
Introduction.................................................................................................................................................. 16
2.
Features ...................................................................................................................................................... 17
3.
Device Overview ......................................................................................................................................... 19
3.1.
Block Diagram ................................................................................................................................ 19
3.2.
Block Function Description............................................................................................................. 20
3.2.1.
System Interface.................................................................................................................. 20
3.2.2.
Video Image Interface (TE-Signal and DPI) ........................................................................ 21
3.2.3.
Address Counter (AC) ......................................................................................................... 21
3.2.4.
Graphic RAM (GRAM)......................................................................................................... 21
3.2.5.
Grayscale Voltage Generating Circuit ................................................................................. 21
3.2.6.
Power Supply Circuit ........................................................................................................... 21
3.2.7.
Timing Generating ............................................................................................................... 21
3.2.8.
Oscillator.............................................................................................................................. 22
3.2.9.
Panel Driver Circuit.............................................................................................................. 22
3.2.10.
MIPI-DSI Controller Circuit .................................................................................................. 22
3.3.
Pin Descriptions ............................................................................................................................. 23
3.4.
Pad Assignment ............................................................................................................................. 27
3.5.
Pad Coordination............................................................................................................................ 28
3.6.
Bump Arrangement ........................................................................................................................ 38
4.
System Interfaces........................................................................................................................................ 39
4.1.
DBI Type B Parallel Interface ......................................................................................................... 39
4.1.1.
Write Cycle Sequence ......................................................................................................... 41
4.1.2.
Read Cycle Sequence......................................................................................................... 42
4.2.
DBI Type C Serial Interface............................................................................................................ 43
4.2.1.
Write Cycle Sequence ......................................................................................................... 43
4.2.2.
Read Cycle Sequence......................................................................................................... 45
4.2.3.
Data Transfer Break and Recovery ..................................................................................... 48
4.3.
Data Transfer Pause ...................................................................................................................... 49
4.3.1.
Serial Interface Pause ......................................................................................................... 50
4.3.2.
Parallel Interface Pause ...................................................................................................... 51
4.4.
Data Transfer Mode........................................................................................................................ 52
4.4.1.
Method 1.............................................................................................................................. 52
4.4.2.
Method 2.............................................................................................................................. 52
4.5.
DPI Parallel Interface (RGB Interface) ........................................................................................... 53
4.5.1.
RGB Interface Selection ...................................................................................................... 53
4.5.2.
RGB Interface Timing .......................................................................................................... 56
4.6.
DSI System Interface ..................................................................................................................... 57
a-Si TFT LCD Single Chip Driver
320RGB x 480 Resolution and 16.7M-color
ILI9488
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 3 of 339 Version: 001
4.6.1.
General Description............................................................................................................. 57
4.6.2.
Interface Level Communication ........................................................................................... 57
4.6.2.1.
General........................................................................................................................ 57
4.6.2.2.
MIPI_CLOCK Lanes.................................................................................................... 58
4.6.2.2.1.
Low Power Mode (LPM) .................................................................................... 58
4.6.2.2.2.
Ultra Low Power Mode (ULPM)......................................................................... 60
4.6.2.2.3.
High-Speed Clock Mode (HSCM)...................................................................... 61
4.6.2.3.
MIPI_DATA Lanes ....................................................................................................... 64
4.6.2.3.1.
General .............................................................................................................. 64
4.6.2.3.2.
Escape Modes ...................................................................................................64
4.6.2.3.2.1 Low-Power Data Transmission (LPDT) ................................................ 66
4.6.2.3.2.2 Ultra-Low Power State (ULPS)............................................................. 67
4.6.2.3.2.3 Remote Application Reset (RAR) ......................................................... 67
4.6.2.3.2.4 Tearing Effect (TEE) ............................................................................. 68
4.6.2.3.2.5 Acknowledge (ACK) ............................................................................. 69
4.6.2.3.3.
High-Speed Data Transmission (HSDT)............................................................ 70
4.6.2.3.3.1 Enter High-Speed Data Transmission (T
SOT
of HSDT)......................... 70
4.6.2.3.3.2 Leave High-Speed Data Transmission (TEOT of HSDT) .....................71
4.6.2.3.3.3 Burst of the High-Speed Data Transmission (HSDT)........................... 72
4.6.2.3.3.4 Bus Turnaround (BTA).......................................................................... 72
4.6.3.
Packet Level Communication .............................................................................................. 73
4.6.3.1.
Short Packet (SPa) and Long Packet (LPa) Structures .............................................. 73
4.6.3.1.1.
Bit Order of Bytes in Packets............................................................................. 74
4.6.3.1.2.
Byte Order of Multiple Byte Information in Packets...........................................75
4.6.3.1.3.
Packet Header (PH)........................................................................................... 75
4.6.3.1.3.1 Data Identification (DI).......................................................................... 76
4.6.3.1.3.2 Packet Data of a Short Packet ............................................................. 79
4.6.3.1.3.3 Word Count of a Long Packet .............................................................. 80
4.6.3.1.3.4 Error Correction Code (ECC) ............................................................... 81
4.6.3.1.4.
Packet Data on a Long Packet .......................................................................... 85
4.6.3.1.5.
Packet Footer on a Long Packet ....................................................................... 85
4.6.3.2.
Packet Transmission ................................................................................................... 87
4.6.3.2.1.
Packet from the MCU to the Display Module .................................................... 87
4.6.3.2.1.1
Display Command Set (DCS)............................................................................ 87
4.6.3.2.1.2
Display Command Set Write, no Parameter (DSCWN-S)................................. 87
4.6.3.2.1.3
Display Command Set Write, 1 Parameter (DCSW1-S) ................................... 88
4.6.3.2.1.4
Display Command Set Write Long (DCSW-L)................................................... 89
4.6.3.2.1.5
Display Command Set Read, No Parameter (DCSRN-S)................................. 93
4.6.3.2.1.6
Null Packet, No Data (NP-L).............................................................................. 95
a-Si TFT LCD Single Chip Driver
320RGB x 480 Resolution and 16.7M-color
ILI9488
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 4 of 339 Version: 001
4.6.3.2.1.7
End of Transmission Packet (EoTP).................................................................. 97
4.6.3.2.2.
Packet from the Display Module to the MCU .................................................... 98
4.6.3.2.2.1.
Used Packet Type.............................................................................................. 98
4.6.3.2.2.2
Acknowledge with Error Report ....................................................................... 100
4.6.3.2.2.3
DCS Read Long Response (DCSRR-L).......................................................... 102
4.6.3.2.2.4
DCS Read Short Response, 1 Byte Returned (DCSRR1-S)........................... 104
4.6.3.2.2.5
DCS Read Short Response, 2 Bytes Returned (DCSRR2-S)......................... 104
4.6.3.3.
Communication Sequences ...................................................................................... 105
4.6.3.3.1.
General ............................................................................................................ 105
4.6.3.3.2.
Sequence......................................................................................................... 106
4.6.3.3.2.1.
DCS Write, 1 Parameter Sequence................................................................. 106
4.6.3.3.2.2.
DCS Write, No Parameter Sequence .............................................................. 107
4.6.3.3.2.3.
DCS Write Long Sequence.............................................................................. 108
4.6.3.3.2.4.
DCS Read, No Parameter Sequence.............................................................. 109
4.6.3.3.2.5.
Null Packet, No Data Sequence .......................................................................111
4.6.3.3.2.6.
End of Transmission Packet .............................................................................111
4.6.3.4.
16 Bit/Pixel Writing .................................................................................................... 112
4.6.3.5.
24 Bit/Pixel Writing .................................................................................................... 113
4.6.3.5.1.
24 Bit/Pixel Reading ........................................................................................ 115
4.7.
Display Data Format..................................................................................................................... 119
4.7.1.
DBI Type C Option 1 (3-Line Serial Interface)................................................................... 119
4.7.1.1.
SPI Data for 3-bit/pixel (RGB 1-1-1 Bits Input), 8-color ............................................ 119
4.7.1.2.
SPI Data for 18-bit/pixel (RGB 6-6-6 Bits Input), 262K-color .................................... 120
4.7.2.
DBI Type-C Option 3 (4-Line Serial Interface)................................................................... 121
4.7.2.1.
SPI Data for 3-bit/pixel (RGB 1-1-1 Bits Input), 8-color ............................................ 121
4.7.2.2.
SPI Data for 18-bit/pixel (RGB 6-6-6 Bits Input), 262K-color .................................... 122
4.7.3.
8-bit Parallel MCU Interface .............................................................................................. 123
4.7.3.1.
8-bit Data Bus for 16-bit/pixel (RGB 5-6-5 Bits Input), 65K-color.............................. 123
4.7.3.2.
8-bit Data Bus for 18-bit/pixel (RGB 6-6-6 Bits Input), 262K-color............................ 124
4.7.4.
9-bit Parallel MCU Interface .............................................................................................. 125
4.7.4.1.
9-bit Data Bus for 18-bit/pixel (RGB 6-6-6 Bits Input), 262K-color............................ 125
4.7.5.
16-bit Parallel MCU Interface ............................................................................................ 126
4.7.5.1.
16-bit Data Bus for 16-bit/pixel (RGB 5-6-5 Bits Input), 65K-color............................ 127
4.7.5.2.
16-bit Data Bus for 18-bit/pixel (RGB 6-6-6 Bits Input), 262K-color.......................... 128
4.7.6.
18-bit Parallel MCU Interface ............................................................................................ 129
4.7.6.1.
18-bit Data Bus for 18-bit/pixel (RGB 6-6-6 Bits Input), 262K-color.......................... 130
4.7.7.
24-bit Parallel MCU Interface ............................................................................................ 131
4.7.7.1.
24-bit Data Bus for 24-bit/pixel (RGB 8-8-8 Bits Input), 262K-color.......................... 132
4.8.
DPI Parallel Interface
(
RGB Interface
)
..................................................................................... 133
a-Si TFT LCD Single Chip Driver
320RGB x 480 Resolution and 16.7M-color
ILI9488
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 5 of 339 Version: 001
4.8.1.
16-bit Parallel RGB Interface............................................................................................. 133
4.8.2.
18-bit Parallel RGB Interface............................................................................................. 134
4.8.3.
24-bit Parallel RGB Interface............................................................................................. 135
4.8.3.1.
18-bit/pixel ................................................................................................................. 135
4.8.3.2.
24-bit/pixel Constrained by Dither and Bypass ......................................................... 136
4.9.
DSI Transmission Data Format .................................................................................................... 137
4.9.1.
16-bit per Pixel, Long Packet, Data Type 00 1110 (0Eh)................................................... 137
4.9.2.
MIPI – 18-bit per Pixel, Long Packet, Data Type = 01 1110 (1Eh) .................................... 138
4.9.3.
MIPI – 18-bit per Pixel, Long Packet, Data Type = 10 1110 (2Eh) .................................... 139
5.
Command.................................................................................................................................................. 140
5.1.
Command List .............................................................................................................................. 140
5.1.1.
Standard Command List .................................................................................................... 140
5.1.2.
Extended Command List ................................................................................................... 144
5.2.
Command Description.................................................................................................................. 148
5.2.1.
NOP (00h).......................................................................................................................... 148
5.2.2.
Software Reset (01h)......................................................................................................... 149
5.2.3.
Read Display Identification Information (04h) ................................................................... 150
5.2.4.
Read Number of the Errors on DSI (05h) .......................................................................... 151
5.2.5.
Read Display Status (09h)................................................................................................. 152
5.2.6.
Read Display Power Mode (0Ah) ...................................................................................... 154
5.2.7.
Read Display MADCTL (0Bh)............................................................................................ 156
5.2.8.
Read Display Pixel Format (0Ch) ...................................................................................... 158
5.2.9.
Read Display Image Mode (0Dh) ...................................................................................... 159
5.2.10.
Read Display Signal Mode (0Eh) ...................................................................................... 161
5.2.11.
Read Display Self-Diagnostic Result (0Fh) ....................................................................... 163
5.2.12.
Sleep IN (10h).................................................................................................................... 164
5.2.13.
Sleep OUT (11h)................................................................................................................ 165
5.2.14.
Partial Mode ON (12h)....................................................................................................... 166
5.2.15.
Normal Display Mode ON (13h) ........................................................................................ 167
5.2.16.
Display Inversion OFF (20h).............................................................................................. 168
5.2.17.
Display Inversion ON (21h) ............................................................................................... 169
5.2.18.
All Pixels OFF (22h) .......................................................................................................... 170
5.2.19.
All Pixels ON (23h) ............................................................................................................ 171
5.2.20.
Display OFF (28h) ............................................................................................................. 172
5.2.21.
Display ON (29h) ............................................................................................................... 173
5.2.22.
Column Address Set (2Ah) ................................................................................................ 174
5.2.23.
Page Address Set (2Bh) .................................................................................................... 176
5.2.24.
Memory Write (2Ch) .......................................................................................................... 178
5.2.25.
Memory Read (2Eh) .......................................................................................................... 180