摘 要
快速傅立叶变换(FFT)作为时域和频域转换的基本运算，是数字谱分析的必要前提 。
传统的 FFT 使用软件或 DSP 实现，高速处理时实时性较难满足。FPGA 是直接由硬件
实现的，其内部结构规则简单，通常可以容纳很多相同的运算单元，因此 FPGA 在作
指定运算时，速度会远远高于通用的 DSP 芯片。FFT 运算结构相对比较简单和固定，
适于用 FPGA 进行硬件实现，并且能兼顾速度及灵活性。本文介绍了一种通用的可以
在 FPGA 上实现 32 点 FFT 变换的方法。设计复数乘法器为核心设计了 FFT 算法中的
基-2 蝶形运算单元，溢出控制单元和地址与逻辑控制模块等其它模块,并以这些模块和
FPGA 内部的双口 RAM 为基础组成了基-2FFT 算法模块。整个模块采用基-2 时域抽取,
顺序输入,逆序输出的方法;利用 Modelsim 完成了 FFT 模块的前后仿真;利用 Matlab 编写
了用于比较仿真结果和 Matlab 中 FFT 函数产生的结果的程序,从而验证了仿真结果的正
确性。实验果表明，设计完成的系统能够在保证运算精度和实现复杂度的同时，切实
可行地完成设计的总体要求。
关键词：FPGA；FFT；IP 核；基 2；时域抽取
Abstract
Fast Fourier Transform (FFT) as the time domain and frequency domain transformation
of the basic operations is a necessary prerequisite for digital spectrum analysis. The traditional
FFT implementation using software or DSP, high-speed real-time processing is more difficult
to meet. Directly from the FPGA hardware, and its internal structure rules are simple, usually
to accommodate many of the same operation unit, so as specified in FPGA computing, the
speed will be much higher than the general DSP chips. FFT computation structure is
relatively simple and fixed, suitable for hardware implementation using FPGA, and can take
into account the speed and flexibility. This paper presents a generic FPGA can be
implemented on 32 points in the FFT transform method. Design a complex multiplier for the
core design of the FFT algorithm based -2 butterfly unit, overflow control unit and address
logic control module and other modules, and within these modules and FPGA-based dual-port
RAM formed the base - 2FFT algorithm module. When the module is the base -2 domain
extraction, the order of input, output reverse method; use Modelsim before and after the
completion of the FFT module simulation; prepared using Matlab and Matlab simulation
results for the comparison function in the FFT result of the procedures to verify the
correctness of the simulation results. Experimental results show that the design is completed
the system can ensure the realization of the complexity of computing precision and the same
time, practical completion of the overall design requirements.
Key words：FPGA；FFT；IPcore;Base-2；Time-domain extracti
目 录
引言.............................................................................................................................................1
1 FPGA 的基础知识...................................................................................................................2
1.1 FPGA 的简介.....................................................................................................................................2
1.2 FPGA 的基本结构和设计原则.........................................................................................................2
1.3 开发流程和开发软件简介.................................................................................................................3
1.4 VERILOG HDL 简介..........................................................................................................................5
1.4.1 VERILOG 概述..................................................................................................................................5
1.4.2 VERILOG HDL 的优点.....................................................................................................................5
2 IP 核的制作.............................................................................................................................6
2.1 IP 的基本特征....................................................................................................................................6
2.2 IP 开发流程........................................................................................................................................6
2.2.1 IP 设计的四大阶段.........................................................................................................................7
2.2.2 IP 验证的主要过程.........................................................................................................................7
2.3 IP 的规格定义....................................................................................................................................8
2.3.2 IP 的打包提交.................................................................................................................................8
2.4 IP 集成................................................................................................................................................8
2.5 IP 集成的一般考虑............................................................................................................................9
2.5.1 IP 集成的关键技术.........................................................................................................................9
2.6 IP 模块的评估与选择........................................................................................................................9
3 FFT 算法原理........................................................................................................................10
3.1 FFT 的主要算法..............................................................................................................................10
3.1.1 基-2FFT 算法.................................................................................................................................10
3.1.2 基-2 FFT 算法基本原理................................................................................................................11
4 FFT 处理器的 FPGA 的实现................................................................................................17
4.1 整体设计.......................................................................................................................................... 17
4.2 FFT 处理器的工作过程..................................................................................................................18
4.3 引脚说明.......................................................................................................................................... 18
4.4 存储单元.......................................................................................................................................... 20
4.5 旋转因子单元.................................................................................................................................. 21
4.6 原理与算法...................................................................................................................................... 22
4.7 逻辑控制模块.................................................................................................................................. 23
5 FFT 系统仿真测试................................................................................................................24
5.1 FPGA 前端设计...............................................................................................................................24
5.1.1 算法验证和 RTL 设计...................................................................................................................25
5.1.2 仿真与综合....................................................................................................................................25
5.1.3 静态时序分析................................................................................................................................26
5.2 FFT 处理器的资源利用情况..........................................................................................................27
5.3 仿真结果及分析...............................................................................................................................28
5.3.1 实线性信号的仿真........................................................................................................................29
5.3.2 实单频正弦信号的仿真................................................................................................................29
5.3.3 实双频正弦信号的仿真................................................................................................................30
5.3.4 复单频正弦信号的仿真...............................................................................................................31
总结...........................................................................................................................................32
- 1
- 2
- 3
- 4
- 5
前往页