/***********************************************************************
* Filename : hal_lpuart.c
* Description : lpuart driver source file
* Author(s) : xwl
* version : V1.0
* Modify date : 2019-11-19
***********************************************************************/
#include "ACM32Fxx_HAL.h"
static void TIMER_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
static void TIMER_TI1FP1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
static void TIMER_TI2FP2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
static void TIMER_IC1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t filter);
static void TIMER_IC2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t filter);
static void TIMER_IC3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t filter);
static void TIMER_IC4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t filter);
/*********************************************************************************
* Function : HAL_TIMER_MSP_Init
* Description : MSP init, mainly about clock, nvic
* Input : timer handler
* Output : 0: success; else:error
* Author : xwl
**********************************************************************************/
__weak uint32_t HAL_TIMER_MSP_Init(TIM_HandleTypeDef * htim)
{
uint32_t Timer_Instance;
if (0 == IS_TIMER_INSTANCE(htim->Instance))
{
return HAL_ERROR; //instance error
}
Timer_Instance = (uint32_t)(htim->Instance);
switch(Timer_Instance)
{
case TIM1_BASE:
System_Module_Reset(RST_TIM1);
System_Module_Enable(EN_TIM1);
NVIC_ClearPendingIRQ(TIM1_BRK_UP_TRG_COM_IRQn);
NVIC_EnableIRQ(TIM1_BRK_UP_TRG_COM_IRQn);
break;
case TIM3_BASE:
System_Module_Reset(RST_TIM3);
System_Module_Enable(EN_TIM3);
// NVIC_ClearPendingIRQ(TIM3_IRQn);
// NVIC_EnableIRQ(TIM3_IRQn);
break;
case TIM6_BASE:
System_Module_Reset(RST_TIM6);
System_Module_Enable(EN_TIM6);
NVIC_ClearPendingIRQ(TIM6_IRQn);
NVIC_EnableIRQ(TIM6_IRQn);
break;
case TIM14_BASE:
System_Module_Reset(RST_TIM14);
System_Module_Enable(EN_TIM14);
NVIC_ClearPendingIRQ(TIM14_IRQn);
NVIC_EnableIRQ(TIM14_IRQn);
break;
case TIM15_BASE:
System_Module_Reset(RST_TIM15);
System_Module_Enable(EN_TIM15);
NVIC_ClearPendingIRQ(TIM15_IRQn);
NVIC_EnableIRQ(TIM15_IRQn);
break;
case TIM16_BASE:
System_Module_Reset(RST_TIM16);
System_Module_Enable(EN_TIM16);
NVIC_ClearPendingIRQ(TIM16_IRQn);
NVIC_EnableIRQ(TIM16_IRQn);
break;
case TIM17_BASE:
System_Module_Reset(RST_TIM17);
System_Module_Enable(EN_TIM17);
NVIC_ClearPendingIRQ(TIM17_IRQn);
NVIC_EnableIRQ(TIM17_IRQn);
break;
default:
return HAL_ERROR;
}
return HAL_OK;
}
__weak uint32_t HAL_TIMER_Base_MspDeInit(TIM_HandleTypeDef * htim)
{
uint32_t Timer_Instance;
if (0 == IS_TIMER_INSTANCE(htim->Instance))
{
return HAL_ERROR; //instance error
}
Timer_Instance = (uint32_t)(htim->Instance);
switch(Timer_Instance)
{
case TIM1_BASE:
System_Module_Disable(EN_TIM1);
NVIC_ClearPendingIRQ(TIM1_BRK_UP_TRG_COM_IRQn);
NVIC_DisableIRQ(TIM1_BRK_UP_TRG_COM_IRQn);
break;
case TIM3_BASE:
System_Module_Disable(EN_TIM3);
NVIC_ClearPendingIRQ(TIM3_IRQn);
NVIC_DisableIRQ(TIM3_IRQn);
break;
case TIM6_BASE:
System_Module_Disable(EN_TIM6);
NVIC_ClearPendingIRQ(TIM6_IRQn);
NVIC_DisableIRQ(TIM6_IRQn);
break;
case TIM14_BASE:
System_Module_Disable(EN_TIM14);
NVIC_ClearPendingIRQ(TIM14_IRQn);
NVIC_DisableIRQ(TIM14_IRQn);
break;
case TIM15_BASE:
System_Module_Disable(EN_TIM15);
NVIC_ClearPendingIRQ(TIM15_IRQn);
NVIC_DisableIRQ(TIM15_IRQn);
break;
case TIM16_BASE:
System_Module_Disable(EN_TIM16);
NVIC_ClearPendingIRQ(TIM16_IRQn);
NVIC_DisableIRQ(TIM16_IRQn);
break;
case TIM17_BASE:
System_Module_Disable(EN_TIM17);
NVIC_ClearPendingIRQ(TIM17_IRQn);
NVIC_DisableIRQ(TIM17_IRQn);
break;
default:
return HAL_ERROR;
}
return HAL_OK;
}
/*********************************************************************************
* Function : HAL_TIMER_Slave_Mode_Config
* Description : configure timer in slave mode
* Input :
htim: timer handler
sSlaveConfig: slave mode parameter strcture
SlaveMode: TIM_SLAVE_MODE_DIS, TIM_SLAVE_MODE_ENC1...
InputTrigger: TIM_TRIGGER_SOURCE_ITR0, TIM_TRIGGER_SOURCE_ITR1...
TriggerPolarity: TIM_SLAVE_CAPTURE_ACTIVE_RISING, TIM_SLAVE_CAPTURE_ACTIVE_FALLING...
TriggerPrescaler: TIM_ETR_PRESCALER_1, TIM_ETR_PRESCALER_2...
* Output : 0: success; else:error
* Author : xwl
**********************************************************************************/
uint32_t HAL_TIMER_Slave_Mode_Config(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig)
{
if (0 == IS_TIM_SLAVE_INSTANCE(htim->Instance) )
{
return 1; // not supported
}
/*reset SMS and TS bits*/
htim->Instance->SMCR &= (~(BIT0|BIT1|BIT2|BIT4|BIT5|BIT6));
/*SET SMS bits*/
htim->Instance->SMCR |= (sSlaveConfig->SlaveMode & (BIT0|BIT1|BIT2) );
/*SET TS bits*/
htim->Instance->SMCR |= (sSlaveConfig->InputTrigger & (BIT4|BIT5|BIT6) );
switch (sSlaveConfig->InputTrigger)
{
case TIM_TRIGGER_SOURCE_TI1FP1:
TIMER_TI1FP1_ConfigInputStage(htim->Instance, sSlaveConfig->TriggerPolarity, sSlaveConfig->TriggerFilter);
break;
case TIM_TRIGGER_SOURCE_TI2FP2:
TIMER_TI2FP2_ConfigInputStage(htim->Instance, sSlaveConfig->TriggerPolarity, sSlaveConfig->TriggerFilter);
break;
case TIM_TRIGGER_SOURCE_ETRF:
TIMER_ETR_SetConfig(htim->Instance, sSlaveConfig->TriggerPrescaler, sSlaveConfig->TriggerPolarity, sSlaveConfig->TriggerFilter);
break;
case TIM_TRIGGER_SOURCE_ITR0:
case TIM_TRIGGER_SOURCE_ITR1:
case TIM_TRIGGER_SOURCE_ITR2:
case TIM_TRIGGER_SOURCE_ITR3:
// don't need do anything here
break;
default:
return 1;
}
return 0;
}
/*********************************************************************************
* Function : HAL_TIMER_Master_Mode_Config
* Description : configure timer in master mode
* Input :
TIMx: timer instance
sMasterConfig: master mode parameter structure
MasterSlaveMode: TIM_TRGO_RESET, TIM_TRGO_ENABLE...
MasterOutputTrigger: TIM_MASTERSLAVEMODE_DISABLE, TIM_MASTERSLAVEMODE_ENABLE
* Output : 0: success; else:error
* Author : xwl
**********************************************************************************/
uint32_t HAL_TIMER_Master_Mode_Config(TIM_TypeDef *TIMx, TIM_MasterConfigTypeDef * sMasterConfig)
{
/*reset bits*/
TIMx->SMCR &= (~BIT7);
TIMx->CR2 &= (~(BIT4|BIT5|BIT6));
TIMx->SMCR |= sMasterConfig->MasterSlaveMode;
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