cic.rar_VHDL/FPGA/Verilog_VHDL_
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2021-08-12
01:51:09
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收藏 29.67MB RAR 举报 
cic.rar_VHDL/FPGA/Verilog_VHDL_ （306个子文件） 
_info 33KB _info 21KB _info 1KB _info 223B vital_pll.asm 405KB structure.asm 294KB block_arch.asm 134KB lpm_syn.asm 51KB lpm_syn.asm 47KB behavior.asm 44KB lpm_syn.asm 43KB lpm_syn.asm 43KB structure.asm 40KB body.asm 38KB body.asm 37KB behave.asm 35KB vital_le.asm 34KB behavior.asm 30KB vital_le_reg.asm 29KB lpm_syn.asm 26KB vital_le_atom.asm 26KB lpm_syn.asm 25KB body.asm 22KB lpm_syn.asm 20KB lpm_syn.asm 20KB vital_dll.asm 18KB behavior.asm 17KB lpm_syn.asm 16KB behave.asm 15KB lpm_syn.asm 15KB behave.asm 15KB reg_arch.asm 15KB verilog.asm 13KB behavior.asm 13KB lpm_syn.asm 13KB lpm_syn.asm 13KB lpm_syn.asm 13KB verilog.asm 12KB body.asm 11KB altvital.asm 11KB lpm_syn.asm 10KB lpm_syn.asm 10KB lpm_syn.asm 10KB lpm_syn.asm 10KB lpm_syn.asm 9KB lpm_syn.asm 9KB lpm_syn.asm 9KB lpm_syn.asm 7KB _vhdl.asm 7KB behave.asm 7KB altvital.asm 6KB behavior.asm 6KB lpm_syn.asm 5KB pgen_arch.asm 5KB body.asm 5KB lpm_syn.asm 5KB behave.asm 5KB lpm_syn.asm 5KB behave.asm 4KB altvital.asm 4KB architecture_jtag.asm 4KB lpm_syn.asm 4KB behave.asm 3KB lpm_syn.asm 3KB lpm_syn.asm 3KB lpm_syn.asm 3KB _vhdl.asm 3KB behave.asm 3KB architecture_asmiblock.asm 2KB architecture_crcblock.asm 2KB _vhdl.asm 2KB _vhdl.asm 304B _vhdl.asm 232B _vhdl.asm 208B _vhdl.asm 160B cic_test_tb.v.bak 5KB cic_run_msim_gate_vhdl.do.bak 648B cic_run_msim_gate_vhdl.do.bak1 648B cic_run_msim_gate_vhdl.do.bak2 648B cic_run_msim_gate_vhdl.do.bak3 648B cic_run_msim_gate_vhdl.do.bak4 648B cic_run_msim_gate_vhdl.do.bak5 648B cic_run_msim_gate_vhdl.do.bak6 648B cic_run_msim_gate_vhdl.do.bak7 648B fdf.bsf 0B cic.cmp.cdb 19KB cic.map.cdb 7KB cic.sgdiff.cdb 6KB cic.(0).cnf.cdb 5KB cic.pre_map.cdb 4KB cic.rtlv_sg.cdb 4KB cic.signalprobe.cdb 525B cic.rtlv_sg_swap.cdb 158B cic.eco.cdb 141B fdf.cmp 2KB vital_pll.dat 64KB structure.dat 26KB block_arch.dat 16KB _primary.dat 14KB _primary.dat 11KB共 306 条
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simon6902_half2022-08-29怎么能有这么好的资源！只能用感激涕零来形容TAT...
