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Currituck-Evaluation-Kit-Overview.ppt
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2024-01-19
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Currituck_Evaluation_Kit_Overview
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Currituck FAE Training
IBM Confidential
© 2011 IBM Corporation
August 12, 2011
Raleigh, NC
Currituck Evaluation Kit Overview
Currituck Eval Board Training
IBM Confidential
© 2011 IBM Corporation
Page 2
Currituck Eval Kit Overview with PIBS Topics
Currituck Evaluation Kit Overview
Currituck Evaluation Board Quick Setup
• Quick Setup Lab
• Additional Lab Exercises
PIBS (PowerPC Initialization Boot Software) Overview
• Commands
• Environment Variables
• Autoboot Option
• Code Structure
• Boot Sequence
Currituck Eval Board Training
IBM Confidential
© 2011 IBM Corporation
Page 3
Evaluation Board Features
•1 PowerPC 476FPE chip
•2 PPC476FP processors with dedicated 512KB L2 Caches
•2 DDR3 SDRAM slots
•3 PCIe slots (supports 1x4 lanes or 2x2 lanes, and 1x1 lane)
•1 PCI-X slot
•1 Ethernet port (10/100/1000 Mbps)
•8MB socketed FLASH
•1MB SRAM
•2 serial ports (1 for 476FPE, 1 for PSoC)
•5 USB2.0 ports (4 host ports, 1 On-The-Go port)
•1 Generation 2 SATA port
•Real time clock with 44B NVRAM
•2 I2C buses
•Programmable System-on-Chip (PSoC) controller interface
Additional Hardware Required, Beyond Board, to Operate Platform
•Ethernet cable
•Serial port interface cable
•ATX Power Supply
•Requirements in ppc476fpe-kit/doc/AdditionalHWRequired.doc
Currituck Evaluation Kit Hardware
Currituck Eval Board Training
IBM Confidential
© 2011 IBM Corporation
Page 4
Serial Port (476FPE)
Ethernet
DDR3 SDRAM
RISCWatch with
RISCTrace
Power Button
Reset Button
PPC476FPE
PCI-X
Currituck Evaluation Board
ATX Power
Supply
Serial Port (PSoC)
PCIe (1x1lane)
PCIe (1x2lane
or 1x4lane)
PCIe (1x2lane
or disabled)
PSoC Power Controller
SATA
USB
Socketed FLASH
SRAM
On-the-
Go USB
USB
RISCWatch
Real-Time Clock
with NVRAM
Currituck Eval Board Training
IBM Confidential
© 2011 IBM Corporation
Page 5
PPC476FPE Chip Block Diagram
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