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JEDEC JESD89-2A:2007 Test Method for Alpha Source Accelerated Soft Error Rate - 完整英文电子版(17页).pdf
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JEDEC
STANDARD
Test Method for Alpha Source
Accelerated Soft Error Rate
JESD89-2A
Addendum No. 2 to JESD89
(Revision of JESD89-2, November 2004)
OCTOBER 2007
JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
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NOTICE
JEDEC standards and publications contain material that has been prepared, reviewed, and
approved through the JEDEC Board of Directors level and subsequently reviewed and approved
by the JEDEC legal counsel.
JEDEC standards and publications are designed to serve the public interest through eliminating
misunderstandings between manufacturers and purchasers, facilitating interchangeability and
improvement of products, and assisting the purchaser in selecting and obtaining with minimum
delay the proper product for use by those other than JEDEC members, whether the standard is to
be used either domestically or internationally.
JEDEC standards and publications are adopted without regard to whether or not their adoption
may involve patents or articles, materials, or processes. By such action JEDEC does not assume
any liability to any patent owner, nor does it assume any obligation whatever to parties adopting
the JEDEC standards or publications.
The information included in JEDEC standards and publications represents a sound approach to
product specification and application, principally from the solid state device manufacturer
viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or
publication may be further processed and ultimately become an ANSI standard.
No claims to be in conformance with this standard may be made unless all requirements stated in
the standard are met.
Inquiries, comments, and suggestions relative to the content of this JEDEC standard or
publication should be addressed to JEDEC at the address below, or call (703) 907-7559 or
www.jedec.org
Published by
©JEDEC Solid State Technology Association 2004
2500 Wilson Boulevard
Arlington, VA 22201-3834
This document may be downloaded free of charge; however JEDEC retains the
copyright on this material. By downloading this file the individual agrees not to
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PRICE: Please refer to the current
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All rights reserved
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JEDEC Standard No. 89-2A
Page 1
TEST METHOD FOR ALPHA SOURCE ACCELERATED SOFT ERROR RATE
(From JEDEC Board Ballot JCB-07-88, formulated under the cognizance of the JC-14.1
Subcommittee on Reliability Test Methods for Packaged Devices.)
1 Scope
This test method is offered as standardized procedure to determine the alpha particle Soft Error
Rate (SER) sensitivity of solid state volatile memory arrays and bistable logic elements (e.g. flip-
flops) by measuring the error rate while the device is irradiated by a characterized, solid alpha
source
The results of this accelerated test can be used to estimate the alpha particle induced SER for a
given alpha radiation environment. JESD89 describes considerations for executing such an
estimate from data collected with this test method. Refer to JESD89 for other background on
the motivation for requirements in this test method and guidance for those elements left to the
discretion of the tester.
NOTE 1 This test cannot be used to project cosmic-ray induced SER.
NOTE 2 Special considerations apply to devices that are more than memory arrays and/or
bistable logic elements. These can preclude the application of this test procedure. Refer to
JESD89 for further discussion on some examples.
1.1 Applicable documents
JESD89 Measurement and Reporting of Alpha Particles and Terrestrial Cosmic
Ray-Induced Soft Errors in Semiconductor Devices
JESD89-1 Test Method for Real-Time Soft Error Rate
JESD89-3 Test Method for Beam Accelerated Soft Error Rate
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JEDEC Standard No. 89-2A
Page 2
2 Apparatus
The performance of this test requires equipment that is capable of providing the particular test
conditions to which the test samples will be subjected.
2.1 Vehicle design and operation
The biasing and operating schemes shall consider the limitations of the devices and shall not
overstress the devices or contribute to thermal runaway.
2.2 Device mounting
Equipment design, if required, shall provide for mounting of devices to minimize adverse effects
while parts are under test (e.g., improper heat dissipation).
2.3 Power supplies and signal sources
Instruments (e.g., oscilloscopes) used to set up and monitor power supplies and signal sources
shall be calibrated and have long-term stability. Electrical noise shielding shall be in place to
allow for accurate test results.
3 Terms and definitions
DUT: Device under test.
absolute maximum rated voltage: The maximum voltage that may be applied to a device and
beyond which damage (latent or otherwise) may occur. It is frequently specified by device
manufacturers for a specific device and/or technology.
alpha activity (of a source): The number of alpha particles that decay in an alpha source per
unit time.
NOTE The preferred SI unit is the becquerel (Bq), which is one disintegration per second.
(1 curie = 3.7 x 10
10
becquerels).
critical charge (Qc): The minimum amount of collected charge that will cause the node to
change state.
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