2 Altera Product Catalog
•
2014
•
www.altera.com Altera Product Catalog
•
2014
•
www.altera.com 3
20 nm DEVICE PORTFOLIO
2
Maximum Resource Count for Arria 10 GX FPGAs
1
10AX016 10AX022 10AX027 10AX032 10AX048 10AX057 10AX066 10AX090 10AX115
Resources
Adaptive logic modules
(ALMs)
61,510 83,730 101,620 118,730 181,790 217,080 250,540 339,620 427,200
LEs (K) 160 220 270 320 480 570 660 900 1,150
Registers 246,040 334,920 406,480 474,920 727,160 868,320 1,002,160 1,358,480 1,708,800
M20K memory blocks 440 588 750 891 1,438 1,800 2,133 2,423 2,713
M20K memory (Mb) 9 11 15 17 28 35 42 47 53
MLAB memory (Mb) 1 1.8 2.4 2.8 4.3 5.0 5.7 9.2 12.7
Variable-precision digital
signal processing (DSP)
blocks
156 192 800 985 1,368 1,612 1,855 1,518 1,518
18 x 19 multipliers 312 382 1,660 1,970 2,736 3,046 3,356 3,036 3,036
Architectural
Features
Global clock networks 32
Regional clock networks 8 8 8 8 8 8 16 16 16
Design security Bitstream encryption with authentication
I/O Features
I/O voltage levels
supported (V)
1.2, 1.25, 1.35, 1.8, 2.5, 3.0
2
I/O standards supported
3 V I/Os Only: 3 V LVTTL, 2.5 V CMOS
DDR and LVDS I/Os: POD12, POD10, Differential POD12, Differential POD10, LVDS, RSDS, mini-LVDS, LVPECL
All I/Os: 1.8 V CMOS, 1.5 V CMOS, 1.2 V CMOS, SSTL-18 (I and II), SSTL-15 (I and II), SSTL-135, SSTL-125,
SSTL-12, HSTL-18 (I and II), HSTL-15 (I and II), HSTL-12 (I and II), HSUL-12, Differential SSTL-18 (I and II),
Differential SSTL-15 (I and II), Differential SSTL-135, Differential SSTL-125, Differential SSTL-12,
Differential HSTL-18 (I and II), Differential HSTL-15 (I and II), Differential HSTL-12 (I and II), Differential HSUL-12
LVDS channels, 1.6 Gbps
(receive/transmit)
120 120 168 168 222 324 324 384 384
Embedded dynamic phase
alignment (DPA) circuitry
3
On-chip termination (OCT) Series, parallel, and differential
Transceiver count 12 12 24 24 36 48 48 96 96
PCI Express
®
(PCIe
®
)
hard IP blocks (Gen3)
1 1 2 2 2 2 2 4 4
Memory devices supported DDR4, DDR3, DDR2, QDR IV, QDR II+, QDR II+ Xtreme, LPDDR3, LPDDR2, RLDRAM 3, RLDRAM II, LLDRAM II, HMC
1
All data is correct at the time of printing, and may be subject to change without prior notice. For the latest information, please visit www.altera.com.
2
3.0 V compliant, requires a 3 V power supply.
The following features, packages, and I/O matrices give you an overview of our devices. To get more details about these
devices or other older devices that are available, check out our online selector guide at www.altera.com/selector.
Arria
®
10 GX FPGAs: Up to 96 full-duplex transceivers with data rates up to 17.4 Gbps, 16 Gbps backplane, and up to 1,150K
equivalent logic elements (LEs).
Arria 10 GX FPGA Features
www.altera.com/selector