Xilinx Standalone Library
Documentation
LwIP 1.4.1 Library v2.0
UG650 (2017.4) December 20, 2017
Table of Contents
Chapter 1: Introduction
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Chapter 2: Using lwIP
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Setting up the Hardware System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Setting up the Software System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Configuring lwIP Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Customizing lwIP API Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Configuring Xilinx Adapter Options . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Configuring Memory Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Configuring Packet Buffer (Pbuf) Memory Options . . . . . . . . . . . . . . . . . . 14
Configuring ARP Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Configuring IP Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Configuring ICMP Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Configuring IGMP Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Configuring UDP Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Configuring TCP Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Configuring DHCP Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Configuring the Stats Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Configuring the Debug Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Chapter 3: LwIP Library APIs
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Raw API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Xilinx Adapter Requirements when using the RAW API . . . . . . . . . . . . . . . 20
LwIP Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
RAW API Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Socket API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Xilinx Adapter Requirements when using the Socket API . . . . . . . . . . . . . . 22
Xilkernel/FreeRTOS scheduling policy when using the Socket API . . . . . . . . . 22
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Socket API Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Using the Xilinx Adapter Helper Functions . . . . . . . . . . . . . . . . . . . . . . . 23
lwip_init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
xemac_add . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
xemacif_input_thread . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
xemacif_input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
xemacpsif_resetrx_on_no_rxdata . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Appendix A: Additional Resources and Legal Notices
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Chapter 1
Introduction
The lwIP is an open source TCP/IP protocol suite available under the BSD license. The lwIP is a standalone
stack; there are no operating systems dependencies, although it can be used along with operating systems.
The lwIP provides two A05PIs for use by applications:
• RAW API: Provides access to the core lwIP stack.
• Socket API: Provides a BSD sockets style interface to the stack.
The lwip141_v2_0 is an SDK library that is built on the open source lwIP library version 1.4.1. The lwip141_v
2_0 library provides adapters for the Ethernetlite (axi_ethernetlite), the TEMAC (axi_ethernet), and the Gigabit
Ethernet controller and MAC (GigE) cores. The library can run on MicroBlaze
™
, ARM Cortex-A9, ARM
Cortex-A53, and ARM Cortex-R5 processors. The Ethernetlite and TEMAC cores apply for MicroBlaze systems.
The Gigabit Ethernet controller and MAC (GigE) core is applicable only for ARM Cortex-A9 system (Zynq
®
-7000
processor devices) and ARM Cortex-A53 & ARM Cortex-R5 system (Zynq® UltraScale+™ MPSoC).
Features
The lwIP provides support for the following protocols:
• Internet Protocol (IP)
• Internet Control Message Protocol (ICMP)
• User Datagram Protocol (UDP)
• TCP (Transmission Control Protocol (TCP)
• Address Resolution Protocol (ARP)
• Dynamic Host Configuration Protocol (DHCP)
• Internet Group Message Protocol (IGMP)
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References
• lwIP wiki:
http://lwip.scribblewiki.com
• Xilinx® lwIP designs and application examples:
[http://www.xilinx.com/support/documentation/application
_
notes/xapp1026.pdf]
• lwIP examples using RAW and Socket APIs:
[http://savannah.nongnu.org/projects/lwip/]
• FreeRTOS Port for Zynq is available for download from the FreeRTOS website
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