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基于ARM和FPGA的高速数据采集卡的设计与实现.doc
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基于ARM和FPGA的高速数据采集卡的设计与实现.doc
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摘 要
采集是认知的开始、测量的前提、分析的基础,绝大多数的电子设备、仪器都是
数据采集为基础。随着电子技术和数字技术的飞速发展,信号的传输速度和 CPU 的处
理速度越来越快,因此对数据采集和处理的要求也越来越高。
由于芯片技术的限制我国很难在高端的数据采集系统中有所作为,一般国内的数
据采集卡都处于中低端产品,多用于中低频信号的采集中,很少有符合我们设计要求
的高速采集系统。课题中的高速数据采集卡是研究高性能分析仪器的一部分,它与一
般的数据采集卡存在区别,主要区别在于我们的系统对数据输出的要求不强,系统可
以自成系统,有一定的数据处理和分析能力。本设计采用 AD 转换器+FPGA 芯片+ARM 处
理器的结构,实现了采样率为 250M 的数据采集卡。
论文从宏观和微观两个方面来分析数据采集卡的各个组成部分。从宏观上分析了
采集系统中各个芯片间的数据流向、速度匹配和具体通信方式的选择等问题。使用乒
乓机制降低了数据处理的速度,来降低 FPGA 中的预处理难度,使 FPGA 处理时序余量
更加充裕。在 ARM 与 FPGA 通信方式上使用 DMA 传输,大大提高了数据传输的速率,并
解放了后端的 ARM 处理器。设计从宏观上优化数据传输的效率,充分发挥器件的性能,
并提出了一些改进系统性能的方案。从微观实现上,数据是从前端数据调理电路进入 AD
转换器,再由 FPGA 采集 AD 转换器输出的数据,后经过数据的触发、成帧等预处理,
预处理后的数据再传输给后端的 ARM 处理器,最后由 ARM 处理器送给 LCD 显示。微观
实现的过程中遇到了很多问题,主要是在 AD 数据的采集和采集数据的传输上。在后期
的系统调试中遇到了采集数据错位、ARM 与 FPGA 通信效率低下,还有 FPGA 中预处理
时序紧张等问题,通过硬件软件部分的修改,问题都得到一定程度的解决。
在整个数据采集卡的设计过程中还遇到高速 PCB 设计、硬件设计可靠性、设计冗
余性和可扩展性等问题,这些都是硬件设计中的需要考虑和重视的问题,在论文的最
后一章有详细论述。
关键词:高速数据采集 触发 高速 PCB 设计
Abstract
Date acquisition is the premise of measure, the foundation of analysis and the beginning
of cognition. Most precise device is based on the date acquisition. With the development of
the electronic and digital technology, the speed of date transmission and the calculation of
CPU are faster and faster; therefore the requirements of data acquisition and processing are
more severe than before.
It is hard for us to make a brilliant success in the area of high-end data acquisition due to
the restraint of the technology of chip. At present the data acquisition card in our country
are almost low-end products which are always used to deal with median frequencies low
frequencies. And the systems of acquisition seldom are line with the demanding of our
design. In this paper, high-speed data acquisition card is a part of high performance
analytical instruments. The differences between this kind of cards and the others are that
they are not rigid to the output of system and have the ability of data analyzing and
processing. We successfully design a system of 250M sampling frequencies based on the
structure of A/D, FPGA and ARM.
This paper analyzes the system from Macro-and micro respect. From the macro point of
view it analyzes data flowing, speed matching and the selection of specific means of
communication of acquisition system and so on. We adapt ping-pong mechanism to reduce
the speed of analyzing data and pre-difficult of FPGA which lead to the ease of processing
Timing Margin of FPGA. DMA transfer is used as communication between ARM and
FPGA which improve data transmission rates, and liberate the back-end ARM processor.
From the micro point of view, data enter into the A/D converter from the front-end
conditioning circuitry, FPGA collecting data on the output of A/D converter and go through
the pre-operation of triggering and framing of data. After these operations, data are
transmitted to the back-end of the ARM processor and then display on the LCD. A lot of
difficult exited in the successful operation in the micro respect which is mainly about A/D
data collection and the of transmission data. In the latter part of the system we encounter the
dislocation data collection, the inefficiency of ARM and FPGA communication and the
tension of timing in the pre-operation of FPGA. All of these issues have been settled by the
revising of hardware and software.
There are also some problems encountered in the design process of data acquisition card,
such as the design of High-speed PCB, the reliability of hardware design reliability,
redundancy and scalability of the system. All the solutions of these problems are illustrated
in the last part of this paper.
Keyword:High-speed Data Acquisition Triggering High-speed PCB
目录
摘 要 ...............................................................I
Abstract ...........................................................II
第一章 绪 论 ........................................................1
1.1 高速数据采集现状 ............................................1
1.2 数据采集卡在测试仪器中的应用 ................................1
1.3 数据采集卡主要的性能指标 ....................................2
1.4 本文主要研究工作和难点 .......................................2
第二章 系统设计方案和主要器件选型 ..................................4
2.1 系统设计方案 ................................................4
2.2 ADC 芯片选型 .................................................4
2.3 DA 芯片选型 ..................................................5
2.4 FPGA 芯片选型 ................................................6
2.5 主控 CPU 选型 ................................................9
第三章 数据采集与触发电路设计 ......................................11
3.1 前端采集电路设计 ...........................................11
3.2 触发电路与触发控制 .........................................13
3.3 采集中的问题和解决方法 .....................................16
3.4 SDRAM 控制器设计 ............................................20
第四章 各芯片间的数据传输与处理 ....................................25
4.1 采集卡各芯片速度等级的划分和数据流向 .......................25
4.2 ARM 与 FPGA 通信 .............................................26
4.3 数据的模拟输出 .............................................30
4.4 ARM 动态配置 FPGA ...........................................35
第五章 高速 PCB 设计与调试 .........................................41
5.1 高速 PCB 设计 ...............................................41
5.2 硬件调试与故障分析 .........................................45
5.3 焊接经验总结 ................................................46
结 论 ..............................................................49
致 谢 ..............................................................50
参考文献 ...........................................................51
附录 1 ARM 外围电路 ................................................53
附录 2 FPGA 外围电路 ...............................................55
附录 3 同步问题 ....................................................57
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