C8051F系列单片机硬件SPI应用举例（有程序）

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C8051F

SPI

硬件SPI

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**C8051F系列单片机硬件SPI应用详解** C8051F系列单片机是由Silicon Labs公司推出的一款高性能、低功耗的微控制器，它集成了丰富的外设，其中包括硬件SPI（Serial Peripheral Interface）接口。硬件SPI是一种同步串行通信协议，常用于与各种外围设备如传感器、A/D转换器、LCD显示器等进行高速数据传输。在本案例中，我们将探讨如何利用C8051F单片机的硬件SPI功能来读取其他芯片的数据。我们需要了解C8051F单片机的SPI接口特性。C8051F系列的SPI接口通常包括SCK（时钟）、MISO（主设备输入，从设备输出）、MOSI（主设备输出，从设备输入）和SS（从设备选择）这四个信号线。其中，SCK由主设备（C8051F）控制，MISO和MOSI用于数据交换，而SS用于主设备选择一个特定的从设备进行通信。在硬件SPI的应用中，C8051F单片机作为主设备，可以配置为三种不同的工作模式：主发送/从接收模式、主接收/从发送模式以及主发送/主接收模式。这使得C8051F能够灵活地适应不同类型的从设备和应用场景。以"C8051F_SPI接口读写c程序.txt"为例，该程序文件可能包含了C8051F单片机与从设备进行SPI通信的示例代码。在编写这类程序时，我们需要设置SPI的相关寄存器，比如SPI控制寄存器（SPIxCFG）来配置SPI的工作模式、时钟频率和极性，SPI状态寄存器（SPIxSTAT）来监控SPI的状态，以及SPI数据寄存器（SPIxDAT）来读写数据。 "使用c8051f005通过SPI读取SCA100T角度值的程序.doc"文件则可能详细描述了如何通过C8051F005型号的单片机，利用SPI接口读取SCA100T这种角度传感器的数据。SCA100T是一款常见的角度测量传感器，它通过SPI接口提供精确的角度信息。在实现这个功能时，我们需要了解SCA100T的通信协议，设置适当的SPI时序，并正确处理从设备返回的数据。 "С8051F340引脚.jpg"和"C8051F_SPI模块的应用举例.pdf"可能是对C8051F340型号单片机引脚布局的图像展示和SPI模块应用的详细文档。这些资料可以帮助我们理解如何将SPI接口连接到外部设备，以及如何在实际项目中运用SPI通信。 C8051F系列单片机的硬件SPI功能为开发者提供了高效、灵活的串行通信方式，适用于多种嵌入式系统的设计。通过理解和应用这些知识，我们可以实现C8051F与各种SPI兼容设备的无缝连接，从而在物联网、自动化控制等领域开发出功能强大的系统。

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C8051F系列单片机SPI应用.rar （4个子文件）

c8051f340引脚.jpg 181KB

C8051F_SPI接口读写c程序.txt 2KB

C8051F_SPI模块的应用举例.pdf 361KB

使用c8051f005通过SPI读取SCA100T角度值的程序.doc 29KB

AN128

SOFTWARE SPI EXAMPLES FOR THE C8051F30X FAMILY

Relevant Devices

This application note applies to the following devices:

C8051F300, C8051F301, C8051F302, and

C8051F303.

Introduction

This application note is a collection of routines that

can be used to implement a master-mode SPI

device in software. Eight different examples of a

SPI master-mode transfer are provided. The exam-

ples contain two functions for each of the SPI clock

phase and polarity options: an example written in

‘C’, and for increased speed, an assembly routine

that can be called from ‘C’. An example of how to

call the routines from a ‘C’ program and an

EEPROM interface example are also provided. SPI

is a trademark of Motorola Inc.

The SPI functions described in this document are

written to minimize the software overhead required

for the SPI transaction. They are intended for use in

a system where the C8051F30x device is the only

SPI master on the bus.

Hardware Interface

These examples implement the SPI interface using

three GPIO pins for transactions:

MOSI (Master Out / Slave In): This pin is used for

serial data output from the C8051F30x, and should

be configured as a digital push-pull output.

MISO (Master In / Slave Out): This pin is used for

serial data input from the slave device, and should

be configured as an open-drain digital pin.

SCK (Serial Clock): This pin is used as the serial

data clock output from the C8051F30x device, and

should be configured as a digital push-pull output.

Additionally, if a slave select signal is required for

the slave device, a fourth GPIO pin is needed, and

must be declared as a digital push-pull output for

this purpose. All of the dedicated GPIO pins should

be skipped by the crossbar. Figure 1 shows the con-

nections between the SPI master (C8051F30x) and

SPI slave devices.

Function Descriptions

There are eight examples of a software SPI master

contained in this applications note. Each of the four

different SPI modes (Mode 0, Mode 1, Mode 2 and

Mode 3) are given as examples in both ‘C’ and

assembly. Table 1 lists the source files for each

implementation. All of the routines can be called

from ‘C’ using the same function prototype.

Because of this, only one of the sample implemen-

tations should be included when building a project.

The functions can be renamed if multiple SPI

modes are needed in the same system.

MISO

SCK

C8051F30x

MOSI

P0.3

SPI Slave

MOSI

MISO

SCK

NSS

Figure 1. Hardware Configuration

AN128

2 Rev. 1.1

The functions take a single character as an input

parameter and return a single character. The input

parameter is transmitted on the MOSI pin MSB-

first. A byte is simultaneously received through the

MISO pin MSB-first. The function returns the

received data byte from MISO. SCK phase and

polarity are determined by the SPI mode file that is

included when building the project.

SPI Timing

It is important to ensure the timing specifications of

the slave device are met when implementing a soft-

ware SPI master. Because C8051F30x devices are

capable of operating at high speeds, it is possible

that the routines presented here may need to be

modified to accommodate the timing restrictions of

the SPI slave device. Each of the four SPI modes

has a specific serial clock phase and polarity, as

shown in Figure 2. In addition, the C and assembly

routines have different timing specifications.

Figure 3 shows the timing for Mode 0 and Mode 3.

Figure 4 shows the timing for Mode 1 and Mode 2.

Table 2 details the number of system clocks

required for each timing parameter.

In a system that is running from a fast clock, any of

the included routines may need to be slowed down

or otherwise modified in order to meet the timing

specifications for the SPI slave device.

Table 1. SPI Function Source Files

Implementation File Name

Mode 0 in ‘C’ SPI_MODE0.c

Mode 0 in Assembly SPI_MODE0.asm

Mode 1 in ‘C’ SPI_MODE1.c

Mode 1 in Assembly SPI_MODE1.asm

Mode 2 in ‘C’ SPI_MODE2.c

Mode 2 in Assembly SPI_MODE2.asm

Mode 3 in ‘C’ SPI_MODE3.c

Mode 3 in Assembly SPI_MODE3.asm

MSB

MISO/

MOSI

NSS

SCK

MODE 3

Bit 7

Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

LSB

SCK

MODE 2

SCK

MODE 1

SCK

MODE 0

Figure 2. Serial Clock Phase / Polarity

AN128

Rev. 1.1 3

MISO

SCK

MOSI

Figure 3. Timing For Mode 0 and Mode 3

Figure 4. Timing For Mode 1 and Mode 2

MISO

SCK

MOSI

AN128

4 Rev. 1.1

Table 2. SPI Timing Parameters

(Refer to Figure 3 and Figure 4 for Timing Diagram and Label Specifications)

Parameter Description

SPI

Mode

C Timing

(SYSCLKs)

Assembly

Timing

(SYSCLKs)

MOSI Valid to SCK High

(MOSI setup)

Mode 0

Mode 3

SCK High to MISO Latched Mode 0

Mode 3

SCK Low to MOSI Change

(MOSI hold)

Mode 0

Mode 3

SCK Low Time Mode 0

Mode 1

Mode 2

Mode 3

SCK High Time Mode 0

Mode 1

Mode 2

Mode 3

MOSI Valid to SCK Low

(MOSI setup)

Mode 1

Mode 2

SCK Low to MISO Latched Mode 1

Mode 2

SCK High to MOSI Change

(MOSI hold)

Mode 1

Mode 2

Function Call to Return From

Function

All

Modes

182 113

AN128

Rev. 1.1 5

Using the Functions

To use one of the example SPI functions in a ‘C’

program, the file containing the function must first

be assembled or compiled. The resulting object file

then can be added to the build list for the project

and linked to the host (calling) software.

The host software must correctly configure the

GPIO pins of the C8051F30x device to the desired

functionality. See “Hardware Interface” on page 1.

A function prototype for the SPI_Transfer( ) func-

tion also needs to be declared within all files that

call the routine. The ‘C’ prototype for all of the

example functions is:

extern char SPI_Transfer(char);

The “extern” modifier tells the linker that the func-

tion itself will be defined in a separate object file.

The functions can be called with the line:

in_spi = SPI_Transfer(out_spi);

where in_spi and out_spi are variables of type char

that are used for the incoming and outgoing SPI

bytes, respectively.

Sample Usage Code

Two full ‘C’ programs are included that demon-

strate the usage of the SPI routines. The first exam-

ple program, “SPI_F300_Test.c”, demonstrates the

method used to call the SPI routine. The second

example, “SPI_EE_F30x.c”, implements a serial

EEPROM interface using the Mode 0 or Mode 3

SPI routines.

SPI_F300_Test.c

In the file “SPI_F300_Test.c”, a for loop is estab-

lished which counts up from 0 to 255 repeatedly.

The for loop variable test_counter is used as the

outgoing SPI byte, while the SPI_return variable is

the incoming SPI byte. The NSS signal is pulled

low immediately before the function call to select

the slave device, and is pulled high after the func-

tion call to de-select it. After the SPI data transfer,

both the outgoing and incoming SPI bytes are

transmitted to the UART, where the progress can be

viewed from a PC terminal program.

To test the sample code, the files

“SPI_F300_Test.c”, “SPI_defs.h”, and one of the

example function files should be placed in a single

directory. “SPI_defs.h” contains the sbit declara-

tions for the four pins used in the SPI implementa-

tion. The file containing SPI_Transfer( ) and the

“SPI_F300_Test.c” file should be compiled or

assembled separately and included in the build.

Once the code has been programmed into the

FLASH on a C8051F30x device, the MISO and

MOSI pins of the device can be tied together to

verify that what is being shifted out is also being

shifted back in. With a PC terminal (configured for

115,200 Baud, 8 Data Bits, No Parity, 1 Stop Bit,

No Flow Control) connected through an RS-232

level translator to the UART, the terminal program

should display that the numbers being sent out on

MOSI are the same as what is being received on

MISO. A section of the resulting output from this

configuration looks like:

SPI Out = 0xFC, SPI In = 0xFC

SPI Out = 0xFD, SPI In = 0xFD

SPI Out = 0xFE, SPI In = 0xFE

SPI Out = 0xFF, SPI In = 0xFF

SPI Out = 0x00, SPI In = 0x00

SPI Out = 0x01, SPI In = 0x01

SPI Out = 0x02, SPI In = 0x02

SPI Out = 0x03, SPI In = 0x03

SPI Out = 0x04, SPI In = 0x04

SPI Out = 0x05, SPI In = 0x05

Tying the MOSI and MISO pins together does not

completely test the functionality of the SPI imple-

评论收藏

内容反馈

csdnbeely

2014-03-18

谢谢资料，已调试成功
taociniren

2014-07-08

还可以吧。有启发。但是不能直接用
shinekl

2013-02-13

还可以，但是不能直接用，删除了一些东西
hello无法复制

2013-12-28

有参考价值。但是是i/o口模拟的。我想要硬件spi的
okwenwen321

2014-08-01

还是可以的

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