单片机二极管显示

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity show is
port(
clk:in std_logic;
ledout,v:out std_logic_vector(7 downto 0)
);
end show;
architecture one of show is
signal count_0,clk1:std_logic;
signal count_1,count_2:std_logic_vector(3 downto 0 ):="0000";
signal count1:integer RANGE 50000 downto 0;
signal count2:integer RANGE 500000 downto 0;
signal show:std_logic_vector(3 downto 0 );
begin


u1:process(clk)
begin

if(clk'event and clk='1') then

if(count1<50000)then count1<=count1+1;
else
count1<=0;
count_0<=not count_0;clk1<=not clk1;
end if;
end if;