SM2258 B0KB F/W Release Note
[ 1 ]
3/21/2017
SM2258 B0KB F/W Release Note
FW Package
MP Tool
Version
ISP
Version
Note
Q0308CS Q0321B Q0308CS
Support TCG function
(enable by MP option).
I
ndustrial grade only.
Add RDT retry pass count and maximum hard decode count to record
RDT retry information.
Info block add two pages RDT Retry Info and Hard Decode Info.
Add SLC Whole Drive Scan condition, enable by MP option(CID offset
0x6F[6]).
Fixed Progra Fail handle with SPOR case.
Q0125B Q0125A Q0125B
Fix drive hang issue when receiving STBY immediate without data in
Modify Sanitize flow
Q0125A Q0125A Q0125A
Update power count when drive not in Device Sleep Resume or
Download Microcode.
Add Thermal Throttling function, enable by CID option offset 0x6F[7].
Modify HIPM/DIPM enable state.
Fix Device Sleep when HIPM and DIPM not enabled.
Q0106A Q0103A Q0106A
Add Retry feature in NAND RDT.
Add Vendor CMD to display DRAM/Flash/ASIC ODT and driving setting.
Modify SATA error event log condition.
P1205A P1202A P1205A
Improve GC policy when dynamic SLC block exist.
Improve pretest scenario regarding bad block0.
Fix some multi-Lun NAND supporting issue.
Optimize SATA phy setting
P1025A P1025A P1025A
Add
“
Enable Cache Program
”
option to enhance
performance
for
128GB Drive.
Extend RDT error count from 256 to 1024
Fix some INTEL L06B to B0KB NAND issues
Fix retry hang issue when fail large than 2 plane case.
Save total SLC bad count when mark bad event occurs.
Fix pure SLC block calculation.
P0925A P1004A P0925A
Add the ID check for the switch between Intel L06B and B0KB.
Add CID option (offset 0x63[3]) to enable/disable Micron trim register
(default enable).
Enhance RDT read/write and check flow.
Add RDT result information of total BB block count by CH/CE, TLC start
block, and RDT threshold settings.
Update MIRA DRAM timing settings.
P0824A P0824A P0824A
U
pdate CID default settings
Bug fix of 3 dies configuration issue
Add more RDT result information
Add MIRA DRAM setting
Enable prepare fast boot when sleep command
P0801B P0729A P0801B
B
ug fixes of RDT failure and
enhancement
of RDT for NAND and DRAM
self-test.
Enable switchable NAND I/O DDR400/DDR200 by CID.
Bug fix of SPOR and DEVSLP issues.
P0718A P0715A P0718A
I
nitial enablement of Intel B0KB.
Fixes of SPOR issue.
