没有合适的资源?快使用搜索试试~ 我知道了~
Computer Organization and Design 5th 习题答案(去水印单文件版)
5星 · 超过95%的资源 需积分: 50 96 下载量 159 浏览量
2019-06-09
09:49:46
上传
评论 13
收藏 4.37MB PDF 举报
温馨提示
试读
87页
Solution for Computer Organization and Design , Fifth Edition, 单文件版,我自己合并的,看起来更方便,还顺便去了批注水印。
资源推荐
资源详情
资源评论
Solutions
1
Chapter 1 Solutions S-3
1.1 Personal computer (includes workstation and laptop): Personal computers
emphasize delivery of good performance to single users at low cost and usually
execute third-party so ware.
Personal mobile device (PMD, includes tablets): PMDs are battery operated
with wireless connectivity to the Internet and typically cost hundreds of
dollars, and, like PCs, users can download so ware (“apps”) to run on them.
Unlike PCs, they no longer have a keyboard and mouse, and are more likely
to rely on a touch-sensitive screen or even speech input.
Server: Computer used to run large problems and usually accessed via a network.
Warehouse scale computer: ousands of processors forming a large cluster.
Supercomputer: Computer composed of hundreds to thousands of processors
and terabytes of memory.
Embedded computer: Computer designed to run one application or one set
of related applications and integrated into a single system.
1.2
a. Performance via Pipelining
b. Dependability via Redundancy
c. Performance via Prediction
d. Make the Common Case Fast
e. Hierarchy of Memories
f. Performance via Parallelism
g. Design for Moore’s Law
h. Use Abstraction to Simplify Design
1.3 e program is compiled into an assembly language program, which is then
assembled into a machine language program.
1.4
a. 1280 ⫻ 1024 pixels ⫽ 1,310,720 pixels ⫽⬎ 1,310,720 ⫻ 3 ⫽ 3,932,160
bytes/frame.
b. 3,932,160 bytes ⫻ (8 bits/byte) /100E6 bits/second ⫽ 0.31 seconds
1.5
a. performance of P1 (instructions/sec) ⫽ 3 ⫻ 10
9
/1.5 ⫽ 2 ⫻ 10
9
performance of P2 (instructions/sec) ⫽ 2.5 ⫻ 10
9
/1.0 ⫽ 2.5 ⫻ 10
9
performance of P3 (instructions/sec) ⫽ 4 ⫻ 10
9
/2.2 ⫽ 1.8 ⫻ 10
9
S-4 Chapter 1 Solutions
b. cycles(P1) ⫽ 10 ⫻ 3 ⫻ 10
9
⫽ 30 ⫻ 10
9
s
cycles(P2) ⫽ 10 ⫻ 2.5 ⫻ 10
9
⫽ 25 ⫻ 10
9
s
cycles(P3) ⫽ 10 ⫻ 4 ⫻ 10
9
⫽ 40 ⫻ 10
9
s
c. No. instructions(P1) ⫽ 30 ⫻ 10
9
/1.5 ⫽ 20 ⫻ 10
9
No. instructions(P2) ⫽ 25 ⫻ 10
9
/1 ⫽ 25 ⫻ 10
9
No. instructions(P3) ⫽ 40 ⫻ 10
9
/2.2 ⫽ 18.18 ⫻ 10
9
CPI
new
⫽ CPI
old
⫻ 1.2, then CPI(P1) ⫽ 1.8, CPI(P2) ⫽ 1.2, CPI(P3) ⫽ 2.6
f ⫽ No. instr. ⫻ CPI/time, then
f(P1) ⫽ 20 ⫻ 10
9
⫻1.8/7 ⫽ 5.14 GHz
f(P2) ⫽ 25 ⫻ 10
9
⫻ 1.2/7 ⫽ 4.28 GHz
f(P1) ⫽ 18.18 ⫻ 10
9
⫻ 2.6/7 ⫽ 6.75 GHz
1.6
a. Class A: 10
5
instr. Class B: 2 ⫻ 10
5
instr. Class C: 5 ⫻ 10
5
instr.
Class D: 2 ⫻ 10
5
instr.
Time ⫽ No. instr. ⫻ CPI/clock rate
Total time P1 ⫽ (10
5
⫹ 2 ⫻ 10
5
⫻ 2 ⫹ 5 ⫻ 10
5
⫻ 3 ⫹ 2 ⫻ 10
5
⫻ 3)/(2.5 ⫻
10
9
) ⫽ 10.4 ⫻ 10
⫺4
s
Total time P2 ⫽ (10
5
⫻ 2 ⫹ 2 ⫻ 10
5
⫻ 2 ⫹ 5 ⫻ 10
5
⫻ 2 ⫹ 2 ⫻ 10
5
⫻ 2)/
(3 ⫻ 10
9
) ⫽ 6.66 ⫻ 10
⫺4
s
CPI(P1) ⫽ 10.4 ⫻ 10
⫺4
⫻ 2.5 ⫻ 10
9
/10
6
⫽ 2.6
CPI(P2) ⫽ 6.66 ⫻ 10
⫺4
⫻ 3 ⫻ 10
9
/10
6
⫽ 2.0
b. clock cycles(P1) ⫽ 10
5
⫻ 1⫹ 2 ⫻ 10
5
⫻ 2 ⫹ 5 ⫻ 10
5
⫻ 3 ⫹ 2 ⫻ 10
5
⫻ 3
⫽ 26 ⫻ 10
5
clock cycles(P2) ⫽ 10
5
⫻ 2⫹ 2 ⫻ 10
5
⫻ 2 ⫹ 5 ⫻ 10
5
⫻ 2 ⫹ 2 ⫻ 10
5
⫻ 2
⫽ 20 ⫻ 10
5
1.7
a. CPI ⫽ T
exec
⫻ f/No. instr.
Compiler A CPI ⫽ 1.1
Compiler B CPI ⫽ 1.25
b. f
B
/f
A
⫽ (No. instr.(B) ⫻ CPI(B))/(No. instr.(A) ⫻ CPI(A)) ⫽ 1.37
c. T
A
/T
new
⫽ 1.67
T
B
/T
new
⫽ 2.27
Chapter 1 Solutions S-5
1.8
1.8.1 C ⫽ 2 ⫻ DP/(V
2
*F)
Pentium 4: C ⫽ 3.2E–8F
Core i5 Ivy Bridge: C ⫽ 2.9E–8F
1.8.2 Pentium 4: 10/100 ⫽ 10%
Core i5 Ivy Bridge: 30/70 ⫽ 42.9%
1.8.3 (S
new
⫹ D
new
)/(S
old
⫹ D
old
) ⫽ 0.90
D
new
⫽ C ⫻ V
new
2 ⫻ F
S
old
⫽ V
old
⫻ I
S
new
⫽ V
new
⫻ I
erefore:
V
new
⫽ [D
new
/(C ⫻ F)]
1/2
D
new
⫽ 0.90 ⫻ (S
old
⫹ D
old
) ⫺ S
new
S
new
⫽ V
new
⫻ (S
old
/V
old
)
Pentium 4:
S
new
⫽ V
new
⫻ (10/1.25) ⫽ V
new
⫻ 8
D
new
⫽ 0.90 ⫻ 100 ⫺ V
new
⫻ 8 ⫽ 90 ⫺ V
new
⫻ 8
V
new
⫽ [(90 ⫺ V
new
⫻ 8)/(3.2E8 ⫻ 3.6E9)]
1/2
V
new
⫽ 0.85 V
Core i5:
S
new
⫽ V
new
⫻ (30/0.9) ⫽ V
new
⫻ 33.3
D
new
⫽ 0.90 ⫻ 70 ⫺ V
new
⫻ 33.3 ⫽ 63 ⫺ V
new
⫻ 33.3
V
new
⫽ [(63 ⫺ V
new
⫻ 33.3)/(2.9E8 ⫻ 3.4E9)]
1/2
V
new
⫽ 0.64 V
1.9
1.9.1
p # arith inst. # L/S inst. # branch inst. cycles ex. time speedup
1 2.56E9 1.28E9 2.56E8 7.94E10 39.7 1
2 1.83E9 9.14E8 2.56E8 5.67E10 28.3 1.4
4 9.12E8 4.57E8 2.56E8 2.83E10 14.2 2.8
8 4.57E8 2.29E8 2.56E8 1.42E10 7.10 5.6
S-6 Chapter 1 Solutions
1.9.2
p ex. time
1 41.0
2 29.3
4 14.6
8 7.33
1.9.3 3
1.10
1.10.1 die area
15cm
⫽ wafer area/dies per wafer ⫽ pi*7.5
2
/ 84 ⫽ 2.10 cm
2
yield
15cm
⫽ 1/(1⫹(0.020*2.10/2))
2
⫽ 0.9593
die area
20cm
⫽ wafer area/dies per wafer ⫽ pi*10
2
/100 ⫽ 3.14 cm
2
yield
20cm
⫽ 1/(1⫹(0.031*3.14/2))
2
⫽ 0.9093
1.10.2 cost/die
15cm
⫽ 12/(84*0.9593) ⫽ 0.1489
cost/die
20cm
⫽ 15/(100*0.9093) ⫽ 0.1650
1.10.3 die area
15cm
⫽ wafer area/dies per wafer ⫽ pi*7.5
2
/(84*1.1) ⫽ 1.91 cm
2
yield
15cm
⫽ 1/(1 ⫹ (0.020*1.15*1.91/2))
2
⫽ 0.9575
die area
20cm
⫽ wafer area/dies per wafer ⫽ pi*10
2
/(100*1.1) ⫽ 2.86 cm
2
yield
20cm
⫽ 1/(1 ⫹ (0.03*1.15*2.86/2))
2
⫽ 0.9082
1.10.4 defects per area
0.92
⫽ (1–y^.5)/(y^.5*die_area/2) ⫽ (1⫺0.92^.5)/
(0.92^.5*2/2) ⫽ 0.043 defects/cm
2
defects per area
0.95
⫽ (1–y^.5)/(y^.5*die_area/2) ⫽ (1⫺0.95^.5)/
(0.95^.5*2/2) ⫽ 0.026 defects/cm
2
1.11
1.11.1 CPI ⫽ clock rate ⫻ CPU time/instr. count
clock rate ⫽ 1/cycle time ⫽ 3 GHz
CPI(bzip2) ⫽ 3 ⫻ 10
9
⫻ 750/(2389 ⫻ 10
9
)⫽ 0.94
1.11.2 SPEC ratio ⫽ ref. time/execution time
SPEC ratio(bzip2) ⫽ 9650/750 ⫽ 12.86
1.11.3. CPU time ⫽ No. instr. ⫻ CPI/clock rate
If CPI and clock rate do not change, the CPU time increase is equal to the
increase in the of number of instructions, that is 10%.
剩余86页未读,继续阅读
资源评论
- 陈游泳2023-07-26这个文件解答了大部分习题,并且解答方式简洁清晰,很适合帮助学习者理解课本内容。
- VashtaNerada2023-07-26感谢文件提供者对习题答案的整理和整合工作,帮助学习者节省了大量时间。
- 书看不完了2023-07-26这份文件提供了对《计算机组成与设计(第五版)》习题的详细解答,非常实用。
- MsingD2023-07-26这份文件虽然没有注解或者特别的亮点,但是它的简单实用让人难以抗拒。
- 学习呀三木2023-07-26文件中的解答不仅准确无误,还给出了详细的推理过程,非常有助于提高理解能力。
mathscmc
- 粉丝: 0
- 资源: 18
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功